Parallel programming and algorithm theory
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The vertex colouring problem (VCP) and its generalisations have myriad applications in computer networks. To solve the VCP with colours, numerous distributed algorithms based on LOCAL model have been proposed to reduce time complexity (the number of rounds), where is the maximum vertex degree in the graph. In this paper, the authors present a distributed algorithm based on modified LOCAL model (DIAMOND) that reduces the number of rounds to one. It greedily solves the VCP with at most colours. Computational results on Geometry (GEOM) graphs show that the number of used colours to colour each instance using DIAMOND is about . DIAMOND is easily extended to solve greedily generalised VCPs in only one round. Moreover, they present two efficient resource allocation algorithms using DIAMOND. They allocate more resource to the graph compared with -colouring and even to -colouring algorithms, where is the average vertex degree of the graph. They run in two and rounds.
Most of the algorithms for training restricted Boltzmann machines (RBM) are based on Gibbs sampling. When the sampling algorithm is used to calculate the gradient, the sampling gradient is the approximate value of the true gradient and there is a big error between the sampling gradient and the true gradient, which seriously affects the training effect of the network. Aiming at this problem, this paper analysed the numerical error and orientation error between the approximate gradient and the true gradient. Their influence on the performance of network training is given then. An gradient fixing model was established. It was designed to adjust the numerical value and orientation of the approximate gradient and reduce the error. We also designed gradient fixing based Gibbs sampling training algorithm (GFGS) and gradient fixing based parallel tempering algorithm (GFPT), and the comparison experiment of the novel algorithms and the existing algorithms is given. It has been demonstrated that the new algorithms can effectively tackle the issue of gradient error, and can achieve higher training accuracy at a reasonable expense of computational runtime.
In this study, a multi-agent coordination problem with steady-state regulation constraints is investigated for a class of non-linear systems. Unlike the existing leader-following coordination formulations, a reference signal is not given by a dynamic autonomous leader but determined as the optimal solution of a distributed optimisation problem. Furthermore, the authors consider a global constraint having noisy data observations for the optimisation problem, which implies that the reference signal is not trivially available with the existing optimisation algorithms. To handle these challenges, the authors present a passivity-based analysis and design approach by using only local objective function, local data observation and exchanged information from their neighbours. The proposed distributed algorithms are shown to achieve the optimal steady-state regulation by rejecting the unknown observation disturbances for passive non-linear agents, which are persuasive in various practical problems. Applications and simulation examples are then given to verify the effectiveness of the proposed design.
This paper observes optimal replacement times for a parallel system with n units, when it is operating for successive jobs with a random working cycle. The classical approach of “whichever occurs first” and the newly proposed approach of “whichever occurs last” are respectively employed for replacements scheduled at time T and at working cycle Y , whose policies are called replacement first and replacement last. Two cases when the number of units for this parallel system is a given constant value and a random variable with estimated distribution are considered into modelings. We obtain their expected replacement cost rates and optimal solutions analytically. Further, comparisons of replacement first and replacement last are described in detail to determine which policy could save more replacement cost rate.
In this article, the authors study a leader-following consensus problem for multi-agent systems in a sampled-data setting. A distributed coordination algorithm based on sampled-data control is proposed to track the considered leader. By employing M-matrix theory, the authors derive sufficient conditions on the sampling period and control parameters to ensure that the tracking errors are bounded. Numerical simulations are presented to illustrate the effectiveness of the theoretical results. Moreover, some previous results concerning the leader-following problem with switched coupling topology are improved.
This manuscript addresses the problem of process scheduling in a multitasking computing environment. The mainstream feedback-based approach to that problem preserves the existing scheduler, and adapts some of its parameters by means of convenient loops. On the contrary, in this research, the scheduler is entirely replaced by suitable control structures, synthesised and analysed in the discrete-time domain. The proposed approach allows for a clear interpretability of the involved parameters, whereas the complexity of the obtained scheduling solutions is comparable to the existing ones. Simulation examples support the above claims. The focus is here restricted for convenience to the preemptive single-processor case, although several generalisations are possible.
A number of parallel algorithms admit a static torus-structured task graph. Hexagonal honeycomb torus (HHT) networks are regarded as promising candidates for interconnection networks. In order to efficiently execute a torus-structured parallel algorithm on an HHT, it is essential to map the tasks to processors so that the communication overhead is minimised. The study proves that a (3n, 2n) torus can be embedded into an nth-order HHT with dilation 3, congestion 4, expansion 1 and load factor 1. Consequently, a parallel algorithm with a (3n, 2n) torus task graph can be executed on an nth-order HHT efficiently.
In this paper, an approach is proposed for Parallel Simulated Annealing known as New Parallel Simulated Annealing (NPSA). This approach features coarse-granularity in parallelization, directed at message-passing systems such as clusters. It contains heuristics such as adaptive clustering with SA to achieve more efficiency in local search. Through experiments with various optimization problems and comparison with available schemes. It is shown that NPSA is a powerful general-purposed optimization method. It can also serve as a framework for meta-hevristies to gain broader application.
An algorithm for software or hardware implementation is presented, allowing fast computation of cyclic redundancy checks with arbitrary polynomials and a high flexibility, such as updating of checksums after modifying data block parts with a known old checksum.
There are different types of PID controllers - such as ratio, cascade or split range controllers - and there are different algorithm types - such as position or incremental (velocity) algorithms. The position algorithms can be categorised into ISA, series and parallel algorithms. The most typical operation modes for PID controllers are automatic, manual, cascade and remote. Some manufacturers hide their algorithms, but they should be available so that users can properly tune the instrument. The PID controller is not a secret and it should not be treated as one, although it is very rare for the numerical robustness of the algorithm to be available at all.
A novel quasi-Newton algorithm for adaptively estimating the principal eigensubspace of a covariance matrix by making use of an approximation of its Hessian matrix is derived. A rigorous analysis of the convergence properties of the algorithm by using the stochastic approximation theory is presented. It is shown that the recursive least squares (RLS) technique can be used to implement the quasi-Newton algorithm, which significantly reduces the computational requirements from O( pN2 ) to O( pN), where N is the data vector dimension and p is the number of desired eigenvectors. The algorithm is further generalised by introducing two adjustable parameters that efficiently accelerate the adaptation process. The proposed algorithm is applied to different applications such as eigenvector estimation and the Comon–Golub test in order to study the convergence behaviour of the algorithm when compared with others such as PASTd, NIC, and the Kang et al. quasi-Newton algorithm. Simulation results show that the new algorithm is robust against changes of the input scenarios and is thus well suited to parallel implementation with online deflation.
It has recently been shown that a combined input and output queued (CIOQ) switch with a speed-up factor of 2 can exactly emulate an output-queued (OQ) switch. The main benefit of using a CIOQ switch is to reduce memory bandwidth requirement while providing quality of service (QoS) guarantee. The key component for exact emulation is a matching algorithm for bipartite graphs. For example, a CIOQ switch with a speed-up factor of 2, which adopts the least cushion first/most urgent first (LCF/MUF) matching algorithm, can exactly emulate an OQ switch with any arbitrary service discipline. However, the complexities of cushion calculation and cell reordering required at the output ports make the algorithm very difficult to be realised in a high-speed switch. The authors propose an approximate LCF/MUF algorithm and evaluate its performance for the weighted round-robin service discipline. For ease of implementation, the proposed algorithm calculates approximate cushions and does not perform reordering at the output ports. The trade-off is that it loses the property of exact emulation. It was found, via computer simulations, that the performance of a CIOQ switch with the proposed single-iteration matching algorithm is close to that of an OQ switch under uniform, nonuniform, and correlated input traffic models for offered load up to 0.9. In addition, the cell departure order can be maintained under the single-iteration algorithm.
An AB2 operation is known as an efficient basic operation for public key cryptosystems over GF(2m), and various systolic arrays for performing AB2 operations have already been proposed using a standard basis representation. However, these circuits have certain shortcomings for cryptographic application due to their high circuit complexity and long latency. Therefore, further research on an efficient AB2 multiplication circuit is still needed. Accordingly, the authors present a new AB2 algorithm and its systolic realisations in GF(2m). First, a new algorithm is proposed based on the MSB-first scheme using a standard basis representation. Thereafter, bit-parallel and bit-serial systolic power multipliers are derived that exhibit a lower hardware complexity and smaller latency than conventional approaches. In addition, since the proposed architectures incorporate simplicity, regularity, modularity, and pipelinability, they are well suited to VLSI implementation and can be easily applied as a basic architecture for computing an inverse/division operation and in crypto-processor chip design.
CSP channels are proposed as a means of developing high-level, asynchronous pipeline architectures over and above existing synchronous logic. Channel-based design allows hardware systems to be designed and constructed using top-down software engineering methods, which have not previously been available within hardware–software co-design. The intention is to enhance support for future large-scale co-designs. The design methodology and its performance implications are demonstrated through an exemplar, pipelined design of the Karhunen–Loève Transform (KLT) algorithm, implemented using the Handel-C silicon compiler applied to dense FPGAs.
It is well known that optimal control techniques can provide the ability to design suitable strategies, however, the on-line computing requirements are excessive. The normal procedure is to make various assumptions so that the processing demands are reduced. Based on these assumptions, sequences of linear-quadratic-performance optimal control problems need to be considered. These in turn give rise to standard two-point-boundary-value problems. The solution to such problems involves the computation of the algebraic Riccati equations (AREs). The block diagonal decomposition LDLT, is the key step for those algorithms based on the matrix sign function that are used in solving the AREs. The last few years have witnessed a tremendous effort towards the development of reliable algorithms to solve the AREs and apply it in industrial situations. However, all the implementations and testing of the proposed algorithms have been performed on powerful machines thereby limiting their practical application. The authors present a pivoting strategy that: (i) requires only one-dimension of the matrix for the selection of the pivot; (ii) generates regular communication patterns; and (iii) establishes a software mechanism for the development of fault tolerant applications. The results obtained from a multiprocessor system with a one-way ring topology indicate that the block diagonal LDLT decomposition is a true candidate for real-time use and fault tolerant applications and also as a framework-test for the LAPACK library.
Although the full radix-4 CORDIC algorithm is efficient compared to the standard radix-2 version, the scale-factor overhead causes its improvement to be limited. In this work, an algorithm and its associated architecture have been proposed for parallel compensation of the scale factor for the radix-4 CORDIC algorithm in the rotation mode. The proposed method, which makes no prior assumptions about the elementary angles of rotation, reduces the latency from n to (n/2)+3, where n is the precision length in bits, at the cost of a reasonable increase in hardware complexity. The architecture presented relates to the redundant signed-digit number system. The architecture has been modelled in VHDL and simulated to establish its functional validity.
A parallelised max-Log-MAP model (P-max-Log-MAP) that exploits the sub-word parallelism and very long instruction word architecture of a microprocessor or a digital signal processor (DSP) is presented. The proposed model reduces considerably the computational complexity of the max-Log-MAP algorithm; and therefore facilitates easy implementation.
A unified formal framework for designing and reasoning about power-constrained, real-time systems is described. The framework is based on process algebra, a formalism that has been developed to describe and analyse communicating, concurrent systems. The proposed extension allows the modelling of probabilistic resource failures, priorities of resource usages and power consumption by resources within the same formalism. Thus, it is possible to evaluate alternative power-consumption behaviours and tradeoffs under different real-time schedulers, resource limitations, resource failure probabilities, etc. This paper describes the modelling and analysis techniques and illustrates them with examples, including a dynamic voltage-scaling algorithm.
A connection between a neurofuzzy network model with the Mixture of Experts Network (MEN) modelling approach is established. Based on this linkage, two new neurofuzzy MEN construction algorithms are proposed to overcome the curse of dimensionality that is inherent in the majority of associative memory networks and/or other rule based systems. The first construction algorithm employs a function selection manager module in an MEN system; a conventional latticed based neurofuzzy model is initially generated followed by parsimonious model selection at each iteration using a new simple MEN construction method using a cost criterion based on the MEN model output sensitivity to each expert. This scheme uses an extension to the well established normalised least means squares as a model parametric learning algorithm. The second construction algorithm is based on a new parallel learning algorithm in which each model rule is trained independently, for which the parameter convergence property of the new learning method is established. As with the first approach, an expert selection criterion is utilised in this algorithm, where each rule is either trained or inhibited. These two construction methods are equivalent in their effectiveness in overcoming the curse of dimensionality by reducing the dimensionality of the regression vector, but the latter has the additional computational advantage of parallel processing. The proposed algorithms are analysed for effectiveness followed by numerical examples to illustrate their efficacy for some difficult data based modelling problems.
A comparison between two fully parallel thinning algorithms designed for images sampled on the square and hexagonal grids is reported. Using techniques from mathematical morphology, a hexagonal algorithm has been designed to closely match the operation of a well known square grid algorithm. Proofs of the connectivity and single pixel limb width of the resulting converged hexagonal skeleton have been presented. Implementations of both algorithms were found to produce accurate skeletons, but the hexagonal could be implemented with only 50% of the logical operations required by the square.