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Volume 128
Issue 6
IEE Proceedings I (Solid-State and Electron Devices)
Volume 128, Issue 6, December 1981
Volumes & issues:
Volume 128, Issue 6
December 1981
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- Author(s): Walter Platte
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 193 –196
- DOI: 10.1049/ip-i-1.1981.0048
- Type: Article
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p.
193
–196
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Presently, four basic types of optoelectronic switches are known to be successfully applicable for high-speed optoelectronic microwave switching. A comparison of these devices in terms of maximum power transmission coefficient as a function of optical wavelength is reported. It is found that the substrate edge excitation method offers the highest overall efficiency, and is, therefore, especially practical for a compact switch control through laser diodes. - Author(s): G.G. Roberts ; M.C. Petty ; I.M. Dharmadasa
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 197 –201
- DOI: 10.1049/ip-i-1.1981.0049
- Type: Article
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p.
197
–201
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We report the properties of metal-insulator-semiconductor (MIS) solar cells based on n-type CdTe and an anthracene derivative deposited by the Langmuir-Blodgett technique. The incorporation of the organic insulating layer between a gold electrode and the CdTe is found to increase both the effective barrier height of the device measured in the dark and also the open-circuit voltage measured under illumination conditions. The Langmuir-Blodgett deposition technique has allowed us to investigate, in some detail, the dependence of these characteristics on the thickness of the insulating layer. The optimum efficiency of our devices occurs when theorganic film thickness is approximately 2.4nm. - Author(s): R.H. Tredgold and R. Jones
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 202 –206
- DOI: 10.1049/ip-i-1.1981.0050
- Type: Article
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p.
202
–206
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n+-GaP/stearic-acid/Au MIS structures have been fabricated by depositing monolayers on the chemically etched semiconductor surface using the Langmuir-Blodgett technique. Their electronic and photoelectronic properties are compared with those of n+-GaP/Au diodes. A single monolayer of stearic acid increases the open-circuit photovoltage developed by such devices from 400mV to 900mV without significantly altering the short-circuit photocurrent. The dark I/V characteristics under forward bias conditions and the photoelectric action spectra both show near-ideal Schottky-barrier diode properties and the barrier height as measured by both methods increases from 1.14eV without the monolayer to 1.58eV in its presence. A number of other organic monolayers give very similar results. In the presence of multilayers of stearic acid the behaviour of the MIS device becomes complex and deviates considerably from ideality. In general, the photocurrent due to over-the-barrier excitation is much more affected by the nature and thickness of the interfecial layer than the band-to-band photocurrent. A plausible explanation is offered for the increased barrier height in the presence of a monolayer, based on establised Schottky-barrier theory, but the full range of behaviour observed, and particularly that with multilayers, cannot yet be adequately treated theoretically. - Author(s): S.N. Ai-Refaie and J.E. Carroll
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 207 –210
- DOI: 10.1049/ip-i-1.1981.0051
- Type: Article
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p.
207
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Oxide films have been deposited on InP by sputtering InP in an oxygen DC-excited plasma. The rate of sputtering was enhanced by applying a magnetic field. Preliminary microprobe and Auger analysis of the films has indicated equal proportions of indium and phosphorus with a good incorporation of oxygen and a moderately uniform composition. Measurements on MOS devices have shown a film resistivity of ̃3 × 1012 σcm. The oxide film has been used in fabricating n-channel inversion-type MOSFETs. - Author(s): R.B. Calligaro and A.G. Nassibian
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 211 –217
- DOI: 10.1049/ip-i-1.1981.0052
- Type: Article
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p.
211
–217
(7)
The transient switching characteristics of the metal-insulator (tunnel)-silicon thyristor under base voltage drive are examined. In the monostable common emitter mode measurements are carried out to establish the dependence of the turn-on delay and rise and fall times on base drive, pulsewidth and bias point. The turn-off delay time is also examined, and the results are explained qualitatively. The operation of the device in the monostable common collector mode and the bistable mode are also examined.
Microwave switching performance of high -speed optoelectronic switches: An efficiency comparison of the basic types
Photovoltaic properties of cadmium-telluride/langmuir-film solar cells
Schottky-barrier diodes incorporating langmuir-film interfacial monolayers
Indium phosphide oxide on Inp for MOSFET applications
Switching transients in metal-insulator (tunnel) - silicon thyristor under base voltage drive
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- Author(s): R.S. Ferguson and W.D. Ryan
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 218 –224
- DOI: 10.1049/ip-i-1.1981.0053
- Type: Article
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p.
218
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An accurate simulation of charge transport in a charge-coupled device requires estimate to be made of fringing and self-induced fields. This has involved a two-dimensional solution for the potential distribution in the substrate, which can be expensive on computing time. The algorithm presented here restricts the calculation to a single set of nodal points along the surface of the device, and has been shown to be significantly faster, with little error, when compared with the corresponding two-dimensional solution. An attempt has also been made to obtain a simpler description of charge transport along the channel which avoids some of the problems which arise in the solution of the highly nonlinear transport equation. The simulation of two cases relevant to the operation of the CCD transfer process are presented. A study of injection from a source diffusion is also included. - Author(s): N. Balley and B. Baylac
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 225 –238
- DOI: 10.1049/ip-i-1.1981.0054
- Type: Article
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p.
225
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As we move into the VLSI era, many investigations have been performed on enhancement-mode MOS transistors, and the results have often been used for the depletion-mode device. In order to evaluate the differences from the usual enhancement-mode device, and to understand its own behaviour, we have first made an accurate modelling of a large and wide buried-channel device, assuming a step doping profile. Then, an attempt was made to model the narrow- and short-channel effects, based on regional approaches. The model relies on the assumption that the narrow-channel effect is due to the increase in bulk charge due to the parasitic p+-n+ (field implant-buried layer) diode. For the short-channel effect, our investigations led us to assume that the effective implanted dose is increased by the diffusion of majority carriers from source and drain, which charge is shared between source, drain, bulk and gate. The excess of positive charge controlled by the gate (instead of the lack of negative charge that characterises the short-channel effect of an enhancement-mode MOSFET) can be evaluated with a geometrical approach, by making a double trapezoidal partioning. The surface and buried-channel conductions, as well as the non-pinch-off current are then taken into account to establish the current equations: IDtot = IDsurf + IDB.C + IDn.pinch-off. where IDsurf or IDB.C = f{VDS, VGS, VBS VT (L, W, VBS, VDS)}. The three kinds of current can exist separately or together, thus defining different equations for the total current flowing from source to drain. Comparison with experiments shows a good agreement, and, furthermore, the extracted parameters are very well related to technological parameters. Short and narrow channel transistors, down to micron dimensions, are fairly well described by the model, and one single set of parameters. In conclusion, the depletion-mode transistor appears to be more sensitive to geometry than the enhancement-mode device because of its special structure, and so we need a peculiar model and parameters for this device to get an efficient simulation of circuits fabricated in HMOS technology, where depletion-mode transistors are extensively used as active loads. - Author(s): R.E. Oakley and R.J. Hocking
- Source: IEE Proceedings I (Solid-State and Electron Devices), Volume 128, Issue 6, p. 239 –247
- DOI: 10.1049/ip-i-1.1981.0055
- Type: Article
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p.
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The overall objective of this work has been to identify an MOS model that would meet the needs of circuit designers for CAD, and for which the parameters were easily derived and could be related to process variables, and so contribute to process control. The models in SPICE and MOSAID were evaluated but found unsatisfactory. A new model, CASMOS, has been developed which accurately represents MOS devices over a wide range of geometries with a set of 17 parameters. The equations are simple and economical in CPU time. The parameters can be easily and unambiguously extracted from electrical measurements and can be related to process data. The AC model is an improved version of the Ward and Dutton model, featuring charge conservation and a more accurate representation of CGD in saturation. Continuity of charge from region to region is guaranteed so that charge pumping is suppressed. CASMOS has been incorporated into SPICE and used for circuit simulation. Results of transistor characteristics are presented to demonstrate the accuracy of the DC model and of a ring oscillator to demonstrate the AC model.
Simple model and study of charge handling and injection in charge-coupled devices
Analytical modelling of depletion-mode MOSFET with short- and narrow-channel effects
CASMOS-an accurate MOS model with geometry-dependent parameters: I
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