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IEE Proceedings E (Computers and Digital Techniques)

Volume 134, Issue 4, July 1987

Volume 134, Issue 4

July 1987

Hierarchical multiprocessor architecture
Analysis of input and output configurations for use in four-valued CCD programmable logic arrays
Vertical migration: an experimental study of the candidate-selection problem
New pipelined vector-reduction arithmetic unit for FIR filter implementation
Local rerouting with virtual cut-through switching
Memory-interference model for multiprocessors based on semi-Markov processes

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