IEE Proceedings - Computers and Digital Techniques

Volume 153, Issue 4, July 2006

Volume 153, Issue 4

July 2006

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    • Debug support for complex systems on-chip: a review
      Hybrid BIST energy minimisation technique for system-on-chip testing
      Implementation of guaranteed services in the MANGO clockless network-on-chip
      Exact minimisation of path-related objective functions for binary decision diagrams
      Synthesis tool for low-power finite-state machines with mixed synchronous/asynchronous state memory
      Exploiting mixed-mode parallelism for matrix operations on the HERA architecture through reconfiguration
      Real-time realisation of noise-immune gradient-based edge detector
      Multiple-valued logic buses for reducing bus energy in low-power systems
      Embedded power-aware cycle by cycle variable speed processor

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