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IEE Proceedings - Computers and Digital Techniques

Volume 152, Issue 5, September 2005

Volume 152, Issue 5

September 2005

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    • Hardware/software co-design for virtual machines
      Data transfer analysis for a pair of asynchronous communication algorithms
      Diminished-1 modulo 2n+1 squarer design
      Fastest classes of linearly independent transforms over GF(3) and their properties
      Multiple fault detection and diagnosis techniques for lookup table FPGAs
      Power-aware branch predictor update
      Using hyperprediction to compensate for delayed updates in value predictors
      Scan chain ordering technique for switching activity reduction during scan test
      FPGA implementation of 1D wave equation for real-time audio synthesis
      Fast specification test of TDMA power amplifiers using transient current measurements
      Communication and task scheduling of application-specific networks-on-chip
      Efficient substructure sharing methods for optimising the inner-product operations in Rijndael advanced encryption standard
      Using an operand file to save energy and to decouple commit resources
      Time and space efficient method for accurate computation of error detection probabilities in VLSI circuits
      Efficient reverse converters for four-moduli sets { 2n−1, 2n, 2n+1, 2n+1−1} and {2n−1, 2n, 2n+1, 2n−1−1}

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