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IEE Proceedings - Computers and Digital Techniques

Volume 152, Issue 1, January 2005

Volume 152, Issue 1

January 2005

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    • Editorial: DATE04
      System level processor/communication co-exploration methodology for multiprocessor system-on-chip platforms
      Architecture-level performance estimation method based on system-level profiling
      Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures
      Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems
      Hierarchical multi-dimensional table lookup for model-compiler-based circuit simulation
      Phase–frequency transfer model of analogue and mixed-signal front-end architectures for system-level design
      Noisy signal based background technique for gain error correction in pipeline ADCs

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