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IEE Proceedings - Computers and Digital Techniques

Volume 150, Issue 1, January 2003

Volume 150, Issue 1

January 2003

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Editorial
    • Two-dimensional DCT/IDCT architecture
      Efficient residue to binary converter
      Efficient fault-tolerant scheme based on the RSA system
      Optimal via minimisation by selection of layer assignment and routing ordering in a bubble-sorting-based non-Manhattan channel
      Fault-tolerant wormhole routing in torus networks with overlapped block faults
      Low complexity bit-parallel systolic multiplier over GF(2m) using irreducible trinomials
      Efficient hardware architecture for fast IP address lookup
      Analysis of new pivoting strategy for the LDLT decomposition on a multiprocessor system with distributed memory

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