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IEE Proceedings - Computers and Digital Techniques

Volume 148, Issue 4-5, July–September 2001

Volume 148, Issue 4

July–September 2001

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    • VLSI architecture for quadtree-based fractal image coding
      Low power state assignment and flipflop selection for finite state machine synthesis—a genetic algorithmic approach
      Hardware compiler realising concurrent processes in reconfigurable logic
      Minimising power dissipation in partial scan sequential circuits
      Performance analyses on the generalised buddy system
      Performance analysis of three implementation strategies for distributed lock management

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