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IEE Proceedings - Computers and Digital Techniques

Volume 145, Issue 3, May 1998

Volume 145, Issue 3

May 1998

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    • Mapping finite element grids onto parallel multicomputers using a self-organising map
      SPARC-based VLIW testbed
      Generalised model for Banyan networks with nonuniform traffic
      Area-time-efficient VLSI residue-to-binary converters
      Systolic dual basis serial multiplier
      Design of a basic cell to construct embryonic arrays

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