IEE Journal on Electronic Circuits and Systems
Volume 3, Issue 1, January 1979
Volume 3, Issue 1
January 1979
Threshold voltage generation and supply-independent biasing in c.m.o.s. integrated circuits
- Author(s): Y.P. Tsividis and R.W. Ulmer
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 1 –4
- DOI: 10.1049/ij-ecs.1979.0001
- Type: Article
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A method is presented for the generation of a voltage equal to an integer multiple of the n-channel threshold voltage in c.m.o.s. integrated circuits. Experimental results from an integrated prototype are given and possible applications are discussed
Nonlinear lumped-circuit model for s.c.r.
- Author(s): L.O. Chua and Y.W. Sing
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 5 –14
- DOI: 10.1049/ij-ecs.1979.0002
- Type: Article
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A nonlinear s.c.r. circuit model made up of 6 lumped-circuit elements (3 nonlinear capacitors and 3 nonlinear voltage-controlled current sources) is presented. The model can be used for simulating arbitrary s.c.r. circuits under all operating conditions. In particular, it is capable of predicting all important dynamic effects such as turn-on and turn-off transients, dV/dt triggering, and the minimum commutation-time phenomenon. Computer-simulation results show that the model will correctly simulate all well-known triggering modes and turn-off mechanisms. The model is based entirely upon the device's physical operating principles. Each element in the circuit model corresponds to an actual current component. In particular, carrier currents due to both diffusion and generation-recombination are included, in addition to the usual displacementcurrent components across the 3 depletion layers
Correlator using novel technique for realising noncontinuous variable delay of a signal
- Author(s): P.C. Fannin
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 15 –20
- DOI: 10.1049/ij-ecs.1979.0003
- Type: Article
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This paper reports on the design and performance of a correlator that uses an oscilloscope in realising the noncontinuous delay of a signal. Typical results of the application of the correlator to analogue and digital type signals are given
Microprocessor implementation of number theoretic transforms
- Author(s): S.C.P. Martin and B.J. Stanier
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 21 –26
- DOI: 10.1049/ij-ecs.1979.0004
- Type: Article
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Consideration is given to the suitability of microprocessor systems for the fast implementation of number theoretic transforms (n.t.t.s). Fast-multiply instructions available on some microprocessors, or the use of external multipliers, relax the basic constraints on the choice of a particular n.t.t. A search was made for suitable moduli which allow fast computation of n.t.t.s using Winograd's algorithm. The search was extended for other moduli which allow increased dynamic range when combined using the Chinese remainder theorem. Finally, a description is given of how modular arithmetic may efficiently be performed using microprocessors
Detection processes for severely distorted digital signals
- Author(s): A.P. Clark ; C.P. Kwong ; J.D. Harvey
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 27 –37
- DOI: 10.1049/ij-ecs.1979.0005
- Type: Article
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The paper describes five detection processes that are significant improvements of some recent developments of the Viterbi-algorithm detector. The new processes do not involve either excessive storage or an excessive number of operations per received signal-element, and do not require the use of an adaptive linear filter ahead of the detector, being therefore well suited to applications of digital data transmission over practical voice-frequency channels. Results of computer-simulation tests are presented comparing the tolerances to additive Gaussian noise of the new detection processes with those of the original processes, for many different channels
Erratum: Matrix Coates flow graphs
- Author(s): A. Cichocki and S. Osowski
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, page: 38 –38
- DOI: 10.1049/ij-ecs.1979.0006
- Type: Article
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Frequency-domain analysis of nonlinear electronic circuits in a general purpose c.a.d. program in APL
- Author(s): D.A. Zein and C.W. Ho
- Source: IEE Journal on Electronic Circuits and Systems, Volume 3, Issue 1, p. 39 –44
- DOI: 10.1049/ij-ecs.1979.0007
- Type: Article
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The small-signal frequency-domain analysis of linear and nonlinear electronic circuits has been implemented in a general purpose c.a.d. program in APL. The techniques used include a parallel pivoting and ordering scheme, and APL-oriented parallel algorithms to enhance speed and save storage. An algorithm for solving simultaneous complex algebraic equations is implemented which has the advantages of leaving the circuit-matrix structure invariant in the d.c, a.c. and transient cases. A highly nonlinear circuit of 450 branches, analysed at 40 frequency points, took approximately 3 min of c.p.u. time on the IBM 370/168 machine and the program and data fitted in less than 112K bytes of storage. The turn-around time was approximately 8 min
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