Online ISSN
1755-4543
Print ISSN
1755-4535
IET Power Electronics
Volume 4, Issue 6, July 2011
Volumes & issues:
Volume 4, Issue 6
July 2011
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- Author(s): Y.A. Wang and D.M. Xiao
- Source: IET Power Electronics, Volume 4, Issue 6, p. 615 –623
- DOI: 10.1049/iet-pel.2009.0284
- Type: Article
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The traditional high-voltage high-frequency transformer has a drawback of low power density owing to the rigorous requirements of high-voltage insulation. This study proposes a new configuration for the magnetic core based on planar EE cores. The parallel connection of planar cores was adopted as a unit, and several units were cascaded to form the high-voltage transformer. The electrical potential distribution of the proposed transformer is more uniform than a traditional transformer, and enables a decrease in the insulation distances. The mechanical configuration of a laboratory prototype is discussed, as well as the electrical, parasitic and thermal behaviours. A prototype transformer has been designed and built with the following characteristics: 30 kV output voltage, 60 kW output power and 20 kHz inverting frequency. The transformer was tested and found to have an efficiency of better than 96%. Compared with traditional high-voltage transformers, this transformer has good thermal behaviour, good line insulation properties and a high power density. - Author(s): P.J. Patel ; Vinod Patel ; P.N. Tekwani
- Source: IET Power Electronics, Volume 4, Issue 6, p. 624 –631
- DOI: 10.1049/iet-pel.2009.0292
- Type: Article
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624
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This study describes the effect of dead-time and how to develop dead-time compensation with self-balancing space vector pulse width modulated (SVPWM) for the three-level neutral-point clamped (NPC) topology typically used for high-power induction motor (IM) drives. The dead-time necessary to prevent the short circuit of the power supply in pulse width-modulated (PWM), voltage source inverters (VSIs) results in output voltage deviations. Although individually small, when accumulated over an operating cycle, the voltage deviations are sufficient to distort the applied PWM signal. This study presents a method to correct for the dead-time deviations for a three-level inverter. The proposed pulse-based compensator is less hardware and more software intensive than other dead-time compensation methods. It provides a low-cost solution. Analysing the effects of dead-time on a pulse-by-pulse basis and correcting each pulse accordingly develop the pulse-based technique. The pulse-based dead-time compensation (PBDTC) method with the SVPWM scheme is implemented using a digital signal processor (DSP)-TMS320F2811. The technique is intensively simulated and then evaluated through experimental results on 45 kW (60 HP) IM. The proposed scheme is applicable to any multi-level inverter topology operating on SVPWM. - Author(s): D. Alexa ; A. Sarbu ; I.V. Pletea ; C. Filote ; R. Chiper
- Source: IET Power Electronics, Volume 4, Issue 6, p. 632 –641
- DOI: 10.1049/iet-pel.2010.0020
- Type: Article
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Based on the characteristics of the rectifiers with near sinusoidal input currents [rectifier with near sinusoidal input current-1 (RNSIC-1), with capacitors connected on the DC side and RNSIC-2, with capacitors connected on the AC side], the study proposes a comparative analysis between the performances (generated capacitive current, costs, efficiency, dimensions and other considerations) of the two variants of RNSIC converters with three-phase six-pulse full-bridge diode rectifiers with passive filters. Therefore the technical and economical advantages of the RNSIC converters are demonstrated. The inductors and the capacitors of the RNSIC converters do not belong to the category of resonant circuits tuned to specific frequency. This is the reason why the design requirements for the capacitors are not very stringent as they can have a tolerance range of ±10% without inflicting severe performance degradations. These converters can be used for a wide power range, practically mitigating the current harmonics generated by a three-phase diode rectifier, without being influenced by the harmonics generated by other consumers. - Author(s): S. Samanta ; S. Mukhopadhyay ; R. Sheehan
- Source: IET Power Electronics, Volume 4, Issue 6, p. 642 –650
- DOI: 10.1049/iet-pel.2010.0015
- Type: Article
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This study presents an accurate and fast method for large-signal discrete-time simulation of current controlled DC/DC buck converter in continuous conduction mode. It employs modal decomposition of the state transition matrix for each topology, resulting in an exact and computationally efficient set of decoupled discrete-time state equations. This enables one to obtain an accurate solution for duty ratios iteratively, by equating the switching conditions of the state variables with state equations, which are non-linear in duty ratio. In the absence of a compensating ramp, an efficient way to compute duty ratios explicitly, without iteration, is also suggested. Subsequently, state variables are propagated through the ON and OFF periods, using the state equations exactly but without the need to compute a matrix exponential. This way numerical integration at multiple intermediate points between two switching instants of interest is avoided, which makes the simulation considerably faster, leading to significantly reduced storage requirement compared to common simulation methods, such as using SPICE. It is shown under different parametric conditions that the proposed method has superior accuracy over several approximate simulation methods proposed in the literature. The method can be generalised for other converter topologies, operational modes and control configurations with appropriate changes. - Author(s): A. Khaligh ; P. Chapman ; S.S. Raghavan
- Source: IET Power Electronics, Volume 4, Issue 6, p. 651 –656
- DOI: 10.1049/iet-pel.2010.0022
- Type: Article
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651
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Fast load transient response and tight regulation are two strict specifications of dc–dc converters, called voltage regulator modules (VRMs), to power desktops and microprocessors. This manuscript presents a VRM topology, in which instead of conventional bulky capacitors, small metal–oxide–semiconductor field-effect transistors (MOSFETs) utilised to provide fast transient requirements of the system. VRM topology based on anticipatory control tightly maintains output voltage of the converter within the required output voltage ripple band during transients. In anticipatory control, since there is no need for instantaneous changes in the inductor current, therefore the dynamic response of the converter to the load changes is ultra-fast. A 12/1.5 V, 25 A and 300 kHz VRM, based on anticipatory control is designed, built and tested. The proposed topology is validated with detailed simulation and a hardware prototype. - Author(s): C.K. Chan ; K.W.E. Cheng ; S.L. Ho
- Source: IET Power Electronics, Volume 4, Issue 6, p. 657 –662
- DOI: 10.1049/iet-pel.2009.0099
- Type: Article
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657
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For virtually all converters and inverters, it is necessary to take care of shot-through and deadtime in the half-bridge subcircuits. Floating gate drive designs are also needed. The additional cost to realise these features becomes a concern in low power applications. This study presents a centre-tapped inductor method added to the bridge to satisfy these constraints cost-effectively. The shoot-through current is under controlled. Using push–pull P and N channel metal-oxide silicon field-effect transistors, the floating or level-shift gate drive can be eliminated and the converter becomes simple. The proposed method has been successfully applied to switched capacitor resonant converter. Formulations of the overlapping and resonant equations have also been developed. It is found that the current in the centre-tapped inductor can be transferred to the resonant inductor with the proposed circuitry with no additional loss involved in the design. Moreover, all the current is under zero-current switching. The design has been validated experimentally and high efficiency is realised using the proposed design. - Author(s): B.R. Lin ; J.J. Chen ; J.Y. Dong
- Source: IET Power Electronics, Volume 4, Issue 6, p. 663 –673
- DOI: 10.1049/iet-pel.2010.0028
- Type: Article
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An interleaved soft switching converter with active snubber circuit is presented here. The active snubber circuit not only absorbs the energy stored in the leakage inductor but also achieves zero-voltage switching turn-on feature for power switches. Moreover, the resonant tank which is composed of the leakage inductor and resonant capacitor is used to achieve zero current switching turn-off feature for rectifier diodes at the secondary side of transformer. Hence, the reverse recovery problem can be eliminated. The operational principle and design consideration are discussed in detail. Finally, experimental results taken from a 600W prototype are presented to confirm the effectiveness of the proposed converter. - Author(s): A. Cid-Pastor ; L. Martinez-Salamero ; R. Leyva ; J. Calvente ; R. Giral
- Source: IET Power Electronics, Volume 4, Issue 6, p. 674 –682
- DOI: 10.1049/iet-pel.2010.0190
- Type: Article
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p.
674
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The use of power gyrators as DC impedance matching circuits in photovoltaic (PV) systems is investigated. With the aim of maximum power transfer from a PV panel to a DC load, a G-gyrator is designed as a matching power interface with a time-varying adaptive conductance that guarantees the operation at the maximum power point. The adaptive nature of the gyrator conductance is given by an extremum-seeking control algorithm, which eventually results in a stable oscillation around the maximum power point regardless of the system initial conditions and atmospheric changes. A direct application of this research is the implementation of a high efficient source splitting configuration for maximum power transfer from N independent solar panels to a DC load. - Author(s): Y.-P. Ko ; Y.-S. Lee ; W.-H. Chao
- Source: IET Power Electronics, Volume 4, Issue 6, p. 683 –692
- DOI: 10.1049/iet-pel.2010.0162
- Type: Article
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683
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The proposed fuzzy logic controlled (FLC) system can be considered as a soft switching technique that substantially reduces the switching loss and hence attains higher efficiency by the switching capacitor converter. The proposed frequency modulation FLC quasi-resonant zero-current switching switched-capacitor (SC) converter is a new type of bidirectional power flow control conversion scheme. This device provides voltage conversion ratios from double-mode against half-mode to n-mode against 1/n-mode by adding a different number of SCs and power semiconductor switches with a small series-connected resonant inductor for forward and reverse schemes. The state-space modelling and analysis for the designed FLC take advantage of cybernetics theory. The dynamic simulation and experiments for the proposed FLC for the studied converters are used to demonstrate the validity of the constructed model under different energy conversion topologies and load conditions. - Author(s): J.C. Mayo-Maldonado ; R. Salas-Cabrera ; J.C. Rosas-Caro ; J. De Leon-Morales ; E.N. Salas-Cabrera
- Source: IET Power Electronics, Volume 4, Issue 6, p. 693 –700
- DOI: 10.1049/iet-pel.2010.0191
- Type: Article
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This study proposes several dynamic models for a DC–DC multilevel boost converter. A full-order non-linear dynamic model, a reduced-order non-linear model and a small-signal model are derived. These models are based on the equivalent circuits that depend on the switching states of the converter. In addition, an input–output feedback linearisation controller is derived and implemented. The stability of the closed-loop system is analysed. A Linux-based real-time software is employed for obtaining the experimental results of the closed-loop system. - Author(s): N. Kondrath and M.K. Kazimierczuk
- Source: IET Power Electronics, Volume 4, Issue 6, p. 701 –707
- DOI: 10.1049/iet-pel.2010.0254
- Type: Article
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A general expression for the loop gain of the inner-current loop of peak current-mode-controlled PWM dc–dc converters operating in continuous conduction mode (CCM) is derived as a function of perturbation ratio and switching frequency. It is shown that this expression is identical for all conventional PWM dc–dc converters in CCM, such as buck, boost and buck–boost converters. However, the value of perturbation ratio is dependent on the converter topology. Also, an expression for required slope compensation at a specified phase margin and a maximum duty cycle is presented. The general expression of the loop gain enables the investigation of the margins of stability of the inner loop of peak current-mode-controlled PWM dc–dc converters irrespective of the converter topology. - Author(s): S.K. Mazumder and P. Jedraszczak
- Source: IET Power Electronics, Volume 4, Issue 6, p. 708 –714
- DOI: 10.1049/iet-pel.2010.0228
- Type: Article
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An all-SiC 0.25 MHz 5 kW multiphase dc/dc bidirectional boost converter, operating with a 105°C inlet coolant temperature is described that serves as a charger for the intermediate high-voltage energy storage device (e.g. ultracapacitor) in a plug-in hybrid-electric vehicle (PHEV). The primary focus of this study is to report the high-temperature efficiency of the normally on SiC VJFET and SiC Schottky-based robust converter and identify the key loss components. Further, comparison of efficiencies for hard-switching, soft-switching and dynamic-power-management-based hard-switching conditions are provided that indicate efficacy as well as the limitation of the present-generation of the SiC VJFETs. - Author(s): J.R.R. Zientarski ; R.C. Beltrame ; D.B. Cândido ; M.L. da S. Martins ; H.L. Hey
- Source: IET Power Electronics, Volume 4, Issue 6, p. 715 –724
- DOI: 10.1049/iet-pel.2010.0039
- Type: Article
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p.
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This study presents a design methodology for inductors employed in single-phase power factor correction (PFC) boost converters operating in continuous conduction mode (CCM). A simulation tool based on the proposed design methodology performs an automatic selection of magnetic core taking into account the standard limits for conducted electromagnetic interference (EMI), single- or multi-layer winding pattern and the limit of temperature rise on the inductor core. Through a sweep simulation, the algorithm chooses the switching frequency and the input current ripple that minimise the magnetic volume of boost inductor considering the characteristics of some powder cores (sendust, molypermalloy and high-flux). The design methodology is confirmed by experimental results obtained from a 650 W universal line input PFC prototype, considering a switching frequency of 70 kHz and an input current ripple of 40%. - Author(s): Y. Sun ; C. Tang ; A.P. Hu ; H.L. Li ; S.K. Nguang
- Source: IET Power Electronics, Volume 4, Issue 6, p. 725 –731
- DOI: 10.1049/iet-pel.2009.0318
- Type: Article
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This study proposes a new power flow control method of a resonant converter used for contactless power transfer applications based on a multiple soft-switching operating points (MSSOP) approach. The essential idea is to switch the converter to hop among different zero-current-switching (ZCS) operating points. The proposed MSSOP controller consists of two closed loops. The inner loop achieves soft-switching by detecting the zero crossing instants of the current and controlling the semiconductor switches synchronously. The outer loop controls the power flow by selecting proper ZCS operating points according to the error between the measured and the reference voltages. Simulation and experiment results have verified that the proposed control method can regulate the output voltage of the system to be constant against wide load variations. - Author(s): M. Ramezani and S.M. Madani
- Source: IET Power Electronics, Volume 4, Issue 6, p. 732 –741
- DOI: 10.1049/iet-pel.2010.0150
- Type: Article
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p.
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This study presents a new zero-voltage-switching (ZVS) single-phase bridgeless PFC, using an improved auxiliary circuit to achieve ZVS for all main switches and diodes. Compared to other ZVS bridgeless PFC converters with no extra voltage and/or current stresses, the converter presented here uses lower component count. Since the presented PFC uses a bridgeless rectifier, there are only two semiconductor components in the main current path instead of three in conventional single-switch configurations. This property decreases the conduction losses, significantly. Moreover, ZVS removes switching loss of all main switches and diodes. Furthermore, since resonant current passes only through the auxiliary circuit, there is no extra current and/or voltage stress on the main switches and diodes. The auxiliary switch operates in zero-current conditions; therefore it does not introduce any switching loss. The presented converter just needs a simple non-isolated gate drive circuitry to drive all switches. Nine stages are explained for each ZVS switching period. Design considerations and a control strategy are also explained. Finally, the converter operation is verified by simulation and experimental results.
Prototype design for a high-voltage high-frequency rectifier transformer for high power use
Pulse-based dead-time compensation method for self-balancing space vector pulse width-modulated scheme used in a three-level inverter-fed induction motor drive
Variants of rectifiers with near sinusoidal input currents – a comparative analysis with the conventional diode rectifier
Discrete-time simulation of a peak current controlled DC/DC buck converter using modal decomposition
Control of voltage regulator modules using anticipated load transients
Half-bridge converter based on switched-capacitor resonance without using deadtime control for automotive applications
Analysis and implementation of an interleaved soft switching converter
Design of photovoltaic-based current sources for maximum power transfer by means of power gyrators
Analysis, design and implementation of fuzzy logic controlled quasi-resonant zero-current switching switched-capacitor bidirectional converter
Modelling and control of a DC–DC multilevel boost converter
Loop gain and margins of stability of inner-current loop of peak current-mode-controlled PWM dc–dc converters in continuous conduction mode
Evaluation of a SiC dc/dc converter for plug-in hybrid-electric-vehicle at high inlet-coolant temperature
Design methodology for universal line input boost power factor correction magnetics
Multiple soft-switching operating points-based power flow control of contactless power transfer systems
New zero-voltage-switching bridgeless PFC, using an improved auxiliary circuit
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