IET Power Electronics
Volume 13, Issue 2, 05 February 2020
Volumes & issues:
Volume 13, Issue 2
05 February 2020
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- Author(s): Yihao Wan ; Mingxuan Mao ; Lin Zhou ; Xinze Xi ; Bao Xie ; Siyu Zhou
- Source: IET Power Electronics, Volume 13, Issue 2, p. 203 –220
- DOI: 10.1049/iet-pel.2019.0607
- Type: Article
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Modular multilevel converter (MMC) based high-voltage direct-current (HVDC) transmission system is a promising solution to the bulk power transmission over a long distance, especially for renewable energy integration. However, conventional half-bridge submodules MMC topology is susceptible to dc faults. In this study, dc short-circuit fault analysis and a review on recent advances in clearing dc fault current utilising different topologies are presented. Furthermore, the MMC can also work as a static synchronous compensator, producing reactive power to support the grid and improving the stability of the system when dc fault occurs. Finally, the comparison for different topologies in terms of device cost, estimated power losses, dc fault ride-through capability, and reactive power compensation capability is given.
Review on topology-based dc short-circuit fault ride-through strategies for MMC-based HVDC system
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- Author(s): Visal Raveendran and Manjula G. Nair
- Source: IET Power Electronics, Volume 13, Issue 2, p. 221 –232
- DOI: 10.1049/iet-pel.2019.0009
- Type: Article
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With the growing popularity of electrified transportation across the world, there have been extensive reports of research involving plug-in electric vehicles (PEVs), electric vehicle charging facilities (EVCFs) and their integration to the main electric grid, besides sustainable energy resources for powering these vehicles. This study proffers a power factor corrected level-1 DC public green-charging infrastructure accompanied by an integrated control, for electric light motor vehicles, compliant with recently formulated Indian charging standards. Power factor correction of plug-in electric vehicle charging current, solar photo-voltaic grid integration and charging of energy storage system is achieved using control of bidirectional AC/DC converters. A firmware and user interface for multimode off-board DC charging, with green, fast and semi-fast charging modes are investigated. Intelligent control for fast charging is also presented to reduce its pernicious impact on the grid. The simulation and hardware results verify the prime performance objectives of improving the local power quality and renewable energy utilisation with multimode charging, in the Indian context. The effectiveness of the proposed infrastructure is further demonstrated by a simulated use case, where 30 PEVs are randomly charged, in various modes, at this EVCF during busy commute hours.
- Author(s): Mohammad Reza Alizadeh Pahlavani and Elias Shokati Asl
- Source: IET Power Electronics, Volume 13, Issue 2, p. 233 –247
- DOI: 10.1049/iet-pel.2018.6184
- Type: Article
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In this study, a new DC–DC single-input–dual-output (SIDO) converter is proposed which is able to step up and share the input voltage between the output terminals with constant duty cycle for whole ranges of duty cycles. Due to the fact that the voltage stresses on the semiconductors of the proposed converter are considerably low, the proposed converter can be applied in both low- and high-power applications. This topology can be used instead of two boost converters, which have very improved conversion ratios in comparison with the recently presented step-up converters. The proposed configuration can be used in many applications such as renewable energy sources and diode-clamped inverter in the grid-tied systems. In this paper, steady-state and small-signal analyses of the SIDO converter are presented and the simulation and experimental results are extracted and compared. In practical applications that SIDO is needed, using single-input–single-output can be a solution, resulting high cost. To reduce the costs, this study proposes a novel topology, which has reduced components and can step up the input voltage into two separate ports. Finally, a prototype circuit with 42 V input and 510 V/372 W and 730 V/381 W outputs are built to validate the theoretical analysis.
- Author(s): Mahdi Mosayebi ; Seyed Mohammad Sadeghzadeh ; Mohammad Hassan Khooban ; Josep M. Guerrero
- Source: IET Power Electronics, Volume 13, Issue 2, p. 248 –255
- DOI: 10.1049/iet-pel.2019.0263
- Type: Article
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This study proposes a new decentralised non-linear I–V droop control to achieve current sharing and voltage restoration for paralleled DC nanogrids (DCNGs) in a cluster. The performance of the conventional droop methods in current sharing among parallel converters degrades due to line impedances. The proposed method improves current sharing among the DCNGs with parallel-connected converters by considering the effect of line impedance, which is an important issue in practical applications. By the proposed method, desired current sharing from the light-load to heavy-load condition is achieved. Since only local information (the output voltage and output current of the DCNGs) is used, the proposed method is fully decentralised, and no communication infrastructure is required, which improves the reliability and stability of the overall system. Furthermore, Lyapunov stability theory is applied to investigate the stability of the proposed method. Additionally, the plug-and-play feature is achieved as an important desired functionality in the DCNGs as well as the proposed method provides scalability and modularity for the DCNGs in a cluster. In the end, theoretical analysis and experimental results validate the effectiveness of the proposed control framework for different scenarios.
- Author(s): Wanlu Li ; Quandi Wang ; Yingcong Wang ; Jianwei Kang
- Source: IET Power Electronics, Volume 13, Issue 2, p. 256 –265
- DOI: 10.1049/iet-pel.2019.0700
- Type: Article
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Recently, Wi-Fi wireless power transfer (WPT) has attracted increasing attention. In this study, a rotatable three-dimensional (3D) transmitter (Tx) is first designed which only needs to be powered by a single source without current amplitude or phase control. Mutual inductance formulas of the Tx and a receiver (Rx) during the Tx's 3D rotation are derived based on Biot-Savart law and rotating matrix, and the maximum coupling areas are obtained. A method of achieving equal coupling of Rxs with the Tx which simultaneously charges two Rxs is proposed. A real rotatable 3D Tx and an omnidirectional magnetically coupled resonant (MCR) WPT prototype are fabricated, and the theoretical analysis is verified by simulation and experiment. Experiment displays that the maximum or desired coupling of single or two Rxs in 3D space can be obtained by calculated rotation combinations. The maximum power transfer efficiency (PTE) of the system can reach 90.2% with the transmission distance of 1.5 times the radius of Tx. Finally, the PTE can be maintained at 73% with the transmission distance varying from 18 to 27 cm by a novel method. The proposed 3D technique could be applied to many fields including Wi-Fi WPT home devices, remote sensing and some mechanical systems.
- Author(s): Haifeng Zhang and Gang Liu
- Source: IET Power Electronics, Volume 13, Issue 2, p. 266 –274
- DOI: 10.1049/iet-pel.2019.0488
- Type: Article
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Permanent magnet synchronous motor (PMSM) is the ideal drive for the magnetically suspended turbo-molecular pump (MSTMP) for its high power density, reliable operation and high energy efficiency. Rotor position information is necessary to drive the PMSM. However, because of the installation space limitation and reliability requirement, position sensorless control technology without mechanical position sensors is more attractive. In this study, a sliding mode observer is adopted to estimate the back electromotive force (EMF) that contains the position information. Since the high-order harmonics in the back EMF would lead to harmonic position errors, a fixed frequency extraction filter is proposed to filter out the harmonics. A high precision speed control is of importance to ensure the performance of the MSTMP and also contributes to achieving a better position estimation accuracy, especially under strong disturbances. Therefore, a composite speed controller combining a sliding mode speed controller and a sliding mode disturbance observer is proposed to improve the speed control performance of the MSTMP. The effectiveness of the proposed high-performance control method for the MSTMP motor is evaluated with experiments.
- Author(s): Ashish Patel ; Hitesh Datt Mathur ; Surekha Bhanot
- Source: IET Power Electronics, Volume 13, Issue 2, p. 275 –285
- DOI: 10.1049/iet-pel.2018.6329
- Type: Article
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This study proposes a synchronous reference frame (SRF) theory-based modified power angle control (PAC) method for unified power quality conditioner (UPQC). In the steady state of conventional UPQC, shunt active power filter (APF) supplies total reactive power demand, and series APF sits idle, leading to unbalanced VA loading of the two APFs and increase in overall VA rating of UPQC. PAC methods of UPQC have been devised for reducing the unbalance in VA loading of series and shunt APFs of UPQC by sharing reactive load power between the two APFs. SRF-based PAC methods are robust, but existing ones support only small values of power angle, and thereby limit the improvement in unbalance of VA loading of series and shunt APFs. In this work, a modified SRF-PAC method is proposed to support larger values of power angle, to load the two APFs in proportion to their VA ratings and thus yield smaller unbalance in VA loading of the two APFs of UPQC. Also, a modified power angle estimation is proposed to ensure that voltage and VA load on series converter does not go beyond the rated values. Controller hardware in loop simulations and hardware experiments validate the proposed control method.
- Author(s): Lixia Yang ; Lixin Jia ; Longfei Luo ; Yanbin Zhang ; Gangquan Si ; Zhuxiang Zhang
- Source: IET Power Electronics, Volume 13, Issue 2, p. 286 –294
- DOI: 10.1049/iet-pel.2019.0418
- Type: Article
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Recently, the clamp double sub-module (CDSM) topology with its DC fault clearance ability has become more attractive for use in the modular multilevel converter (MMC)-based high-voltage DC transmission systems. However, the capacitor voltage imbalance caused by the discreteness of the device parameters during the uncontrolled pre-charging process seriously affects the system's safe start-up. To solve this problem, this study provides a novel CDSM-MMC capacitor static voltage balance method. Since the power supplies obtaining energy from the CDSM capacitors greatly influence the static voltage balance, the power supply input current is chosen as the control variable. On the basis of the control signals generated by the voltage balance algorithm, the control of the CDSM power supply input currents makes the arm energy be an average distribution in the CDSM capacitors. This method can replace the capacitor equalising resistors of CDSM to achieve capacitor voltage balance and can reduce the CDSM-MMC's losses. The method requires no additional circuits, and the control strategy is simple. Moreover, the method can apply to the static voltage balance control of other SM topologies with two capacitors. An arm cascaded with two CDSMs is tested and the results show the effectiveness of the proposed method.
- Author(s): Yongyuan Li and Zhangming Zhu
- Source: IET Power Electronics, Volume 13, Issue 2, p. 295 –299
- DOI: 10.1049/iet-pel.2019.0491
- Type: Article
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p.
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Power over Ethernet (PoE) technology has been widely used in networking market for its space-saving, flexibility and low cost. As the PoE system needs to meet maintain power signature (MPS) requirements specified by the IEEE standard, it is important for powered device (PD) to draw a predetermined minimum current. If the PD current goes below the minimum current, the power sourcing equipment (PSE) assumes the PD has been disconnected and terminates operating voltage. If a fixed current is added to exceed the minimum current, a phenomenon of power wasting will be caused during standby or ultra-low power mode. This study proposes an adaptive MPS scheme to achieve power-saving and meet the MPS requirements. It consists of current comparator and MPS circuit to extract the periodic pulsed current for MPS requirements. The proposed scheme has been fabricated in 0.18 μm 100 V Bipolar-CMOS-DMOS process adding no extra pin and an area is 1.45 × 2.23 mm2. Test results show that the proposed interface sources a periodic pulsed current with a period of 318 ms and 25% duty cycle to tackle the issue of MPS absence in very low power condition.
- Author(s): Emilio Plumed ; Jesús Acero ; Ignacio Lope ; José M. Burdío
- Source: IET Power Electronics, Volume 13, Issue 2, p. 300 –306
- DOI: 10.1049/iet-pel.2019.0693
- Type: Article
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This study presents design guidelines for planar induction systems whose winding is considerably farther from its load than in usual arrangements. Optimum efficiency design is paramount for larger distances due to the magnetic field dispersion. To this end, a parameterised finite element model is used to ascertain the system's parameters in this new configuration. This model is used to test variations in frequency, inductor-load distance and inductor diameter. From simulation results, efficiency, output power, power loss volumetric density and near field measurement predictions are obtained. Graphical representation of these results is used to determine the viability of each possible design, choosing one to develop a prototype. Moreover, a study was carried out with Pareto techniques to determine the effect of ferrite coverage and thickness, as well as its distance to the aluminium shielding on efficiency and near field predictions in order to develop a second prototype. The validity of the model is confirmed by experimental tests in small and operating signal regimes.
- Author(s): Yao Wang ; Hai Tao Yu ; Ning Jun Feng ; Yu Chen Wang
- Source: IET Power Electronics, Volume 13, Issue 2, p. 307 –316
- DOI: 10.1049/iet-pel.2019.0819
- Type: Article
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To simplify the control structure and increase the anti-disturbance performance, a non-cascade control method for a permanent magnet synchronous motor drive system is studied, which regulates the speed and current in one loop. The proposed control scheme is a composite control strategy including speed-current single-loop feedback control and feedforward compensation based on disturbance estimation. A feedback controller based on backstepping sliding mode control is proposed to realise speed-current single-loop. Disturbance estimated by a third-order extended state observer is used in feedforward compensation. Rigorous analysis of stability is conducted to validate the convergence of the control scheme. Simulation and experimental results demonstrate that the proposed control scheme achieves a better speed tracking performance and disturbance rejection property over proportional–integral–derivative and sliding mode control.
- Author(s): Zafer Ortatepe and Ahmet Karaarslan
- Source: IET Power Electronics, Volume 13, Issue 2, p. 317 –323
- DOI: 10.1049/iet-pel.2018.5411
- Type: Article
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A comparison of fuzzy self-tuning (FST), sliding mode control (SMC) and conventional proportional–integral (PI) control methods is performed under unbalanced grid conditions using a bridgeless power factor correction (PFC) converter. The bridgeless PFC converter operates the correction of AC line current to obtain a DC output voltage without full bridge rectifier based on these control methods. These control methods generate the duty cycles to provide higher unity power factor and lower total harmonic distortion of input current, even if AC line voltage is distorted. This study focuses on the performance analysis of FST and SMC methods adaptation to the input current for the bridgeless PFC converter and comparing with the conventional PI controller. Although the SMC method is only used in the current control loop, the FST method is used in both current and voltage control loops for eliminating harmonics of input current and regulating of output voltage. The performance of control methods is evaluated with a TMS320F2812 digital signal processor. The simulation and experimental results are compatible with the limits for harmonic current emissions, IEC 61000-3-2 and show that the FST and SMC are better than the conventional PI control method and FST is superior to the SMC.
- Author(s): Szymon Bęczkowski and Stig Munk-Nielsen
- Source: IET Power Electronics, Volume 13, Issue 2, p. 324 –331
- DOI: 10.1049/iet-pel.2019.0559
- Type: Article
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Multilevel converters rely on plurality of DC capacitors switched in specific patterns to obtain the necessary output voltage level. Modular multilevel converter, flying capacitor converter (FLC) and neutral point clamped (NPC) converters require complex control to balance the capacitors’ voltages. Cascaded H-bridge (CHB) converters require plurality of isolated DC sources to energise the capacitors. This study presents a three-level PN cell that modulates the common-mode voltage between the output and input port while simultaneously mirroring the input DC voltage on the output port. Cell's capacitor voltage is naturally balanced and a three-phase multilevel converter requires only one DC power source. The output voltage of a multilevel converter can be higher than the input DC voltage. As a consequence, a single low-voltage DC power source can directly interface a three-phase MV grid.
- Author(s): Yisheng Yuan ; Zhongyi Zhang ; Xianglong Mei
- Source: IET Power Electronics, Volume 13, Issue 2, p. 332 –339
- DOI: 10.1049/iet-pel.2019.0569
- Type: Article
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A boost-integrated LCL resonant DC–DC converter is proposed, which is constituted by a full-bridge inverter module, the main transformer and a flyback transformer, resonant unit, and a rectifier module. The primary winding of the flyback transformer is also used as a resonant inductor and a boost inductor to improve the power density and the voltage gain. In order to meet different output environments, the converter can operate in low voltage-gain mode or high voltage gain mode. In low voltage-gain mode, the converter operates in PWM with LCL resonance. In high voltage-gain mode, the converter operates in PWM with boost and LCL resonance, in which boost modulation plays a role before the LCL resonance to increase the output voltage. Compared with the conventional LCL resonant converter, the new converter has higher voltage gain and is more suitable for a wide output range with the same resonant parameters. The operation principles of the proposed converter are clarified. A prototype with 80–140 V output and maximum output current 2.9 A is built, and experimental data shows that the maximum efficiency of the prototype can be 94.5%, verifying the correctness of the theoretical analysis.
- Author(s): Yu Gu ; Donglai Zhang ; Mingzhu Fang ; Xiaofeng Zhang ; Pengyu Qi
- Source: IET Power Electronics, Volume 13, Issue 2, p. 340 –345
- DOI: 10.1049/iet-pel.2019.0335
- Type: Article
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In this study, a two-stage cascaded pulsed power converter based on the proposed optimised control scheme has been presented. In order to eliminate the low-frequency input current ripple, the front-stage converter only needs to provide average power and the second-stage converter provides pulsed power. Meanwhile, the isolation of energy transfer mode combines with the proposed optimised control method based on the input current AC signal feedback control guarantee smooth input power with low repeat frequency pulsed load. To demonstrated the effectiveness of the proposed low-frequency input current ripple cancellation technique, a 1 kW peak pulsed power prototype is built and tested. The experimental results verify the validity and reliability of the two-stage isolated pulsed power converter with proposed optimised control method, and the proposed methods and concepts in this study can also be applied to all kinds of pulsed power applications.
- Author(s): Yusuf Gupta ; Kishore Chatterjee ; Suryanarayana Doolla
- Source: IET Power Electronics, Volume 13, Issue 2, p. 346 –355
- DOI: 10.1049/iet-pel.2019.0553
- Type: Article
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A voltage-source inverter (VSI) is a key component of a distributed generation unit and an uninterruptible power supply. In this study, a three-phase VSI control using interconnection and damping assignment passivity-based control (IDA–PBC) approach has been revisited and analysed on aspects such as voltage gain, output impedance, transient response, stability and steady-state error. It is shown that in the case of accurately known filter parameters and perfectly zero initial conditions, theoretically, the voltage controller would exhibit unity voltage gain and zero output impedance. It is also shown that the IDA–PBC-based voltage controller exhibits a second-order response to a step input. This property has been utilised to propose a novel systematic procedure for tuning of the IDA–PBC gains based on the transient response specifications. The tuning method reveals that the gains for the outer voltage and inner current loops are related to each other and should not be separately tuned. The presented analysis and the proposed tuning method for controller gain have been tested through simulation studies. The concepts were further validated on a laboratory scale prototype of a three-phase VSI for balanced, unbalanced and non-linear loads.
- Author(s): Esteban Guerrero ; Enrique Guzmán ; Jesús Linares ; Alberto Martínez ; Gerardo Guerrero
- Source: IET Power Electronics, Volume 13, Issue 2, p. 356 –367
- DOI: 10.1049/iet-pel.2019.0832
- Type: Article
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This study deals with the robust velocity controller of a DC motor driven by means of parallel DC/DC buck power converters with equal current distribution, from the perspective of a generalised proportional–integral (GPI)-observers-based active disturbance rejection controller (ADRC). The multivariable system is subject to constant torque load demands and changes in the internal parameters. The linear output feedback controllers actively counteract the exogenous and endogenous disturbances that result from the cascading parallel converter and the DC motor. A rapid prototyping tool is used for synthetising the proposed controller into a field-programmable gate array (FPGA) which is based on Matlab/Simulink and a Xilinx System Generator. The robustness of the proposed ADRC system is analysed. The FPGA-based implementation setup is presented with the purpose of validating the theoretical calculations of the proposed DC motor velocity control.
- Author(s): Chiranjeevi Sadanala ; Swapnajit Pattnaik ; Vinay Pratap Singh
- Source: IET Power Electronics, Volume 13, Issue 2, p. 368 –376
- DOI: 10.1049/iet-pel.2019.0736
- Type: Article
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Multilevel inverters (MLIs) are gaining the widespread attention in various industrial applications. However, the advantages offered by MLIs are only met with the employment of a high number of semiconductor switches and capacitors, which are most vulnerable amongst all the power electronic components. Thus, designing of a reliable MLI topology is a need of the present hour. In this regard, a five-level fault tolerant MLI topology has been proposed here. The proposed MLI topology comprises the main inverter topology and a redundant leg. The main inverter topology comprises bidirectional switches which result in high power losses under both healthy and faulty conditions. Eighteen different cases arising from the inherent redundancy available in the main inverter topology have been analysed to achieve the optimum solution for obtaining high efficiency. A novel redundant leg architecture has been designed, which achieves significantly improved efficiency under all faulty conditions. Under overload conditions, the proposed redundant leg architecture is capable of reducing the current stress on the main inverter switches. An effective qualitative and quantitative comparison of the proposed topology with the recent literature has been presented. The feasibility of the proposed concepts has been verified by the obtained simulation and hardware results.
- Author(s): Milind D. Bagewadi ; Chinmay R. Chobe ; Prathamesh S. Jagtap ; Mahwash Siddiquee ; Sanjay S. Dambhare
- Source: IET Power Electronics, Volume 13, Issue 2, p. 377 –388
- DOI: 10.1049/iet-pel.2019.0521
- Type: Article
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This study proposes a novel buck–boost based interleaved hybrid converter (BIHC), which can supply both AC and DC loads simultaneously. This topology uses two buck–boost derived hybrid converters where the DC outputs of the individual converters are interleaved and the AC voltage is the differential voltage tapped between the two source (of the MOSFETs) nodes of the individual converters. This converter uses only two switches which is lower than similar converters reported in literature, hence reducing the switching losses. In BIHC, there is no possibility of shoot through and no dead time compensation is required. BIHC will find application in hybrid nanogrids supplying residential loads powered by solar photovoltaic. The principle of operation of individual converters is augmented sinusoidal pulse width modulation with AC references for individual converters phase shifted by 180°. This results in line frequency components in the inductor currents and hence the buck–boost stage inductors are relatively larger. However, reduction in number of switches offsets this increase in size. The circuit has been extensively simulated in MATLAB and an experimental prototype of 100 W is tested in the laboratory.
Power factor corrected level-1 DC public green-charging infrastructure to promote e-mobility in India
DC–DC SIDO converter with low-voltage stress on switches: analysis of operating modes and design considerations
Decentralised non-linear I–V droop control to improve current sharing and voltage restoration in DCNG clusters
Three-dimensional rotatable omnidirectional MCR WPT systems
High-performance control method for the MSTMP motor
Enhancing VA sharing between the shunt and series APFs of UPQC with a modified SRF-PAC method
Static voltage balance method of CDSM-MMC based on power supply control
Adaptive maintain power signature scheme for power over ethernet system
Design methodology of high performance domestic induction heating systems under worktop
Non-cascade backstepping sliding mode control with three-order extended state observer for PMSM drive
DSP-based comparison of PFC control techniques applied on bridgeless converter
Three-level PN cell for multilevel converters
Boost-integrated LCL resonant converter with high voltage gain
Research on low input current ripple two-stage converter for low frequency pulsed-power applications
Controller design, analysis and testing of a three-phase VSI using IDA–PBC approach
FPGA-based active disturbance rejection velocity control for a parallel DC/DC buck converter-DC motor system
Fault tolerant architecture of an efficient five-level multilevel inverter with overload capability characteristics
Buck–boost derived interleaved hybrid converter for residential nanogrid applications
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- Source: IET Power Electronics, Volume 13, Issue 2, page: 389 –389
- DOI: 10.1049/iet-pel.2019.1289
- Type: Article
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Erratum: Reduction of high-frequency injection losses, acoustic noise and total harmonic distortion in IPMSM sensorless drives
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