Electrical discharge machining (EDM) is a non-conventional machining technique that requires pulse generators to create sparks between the tool and the workpiece. Classical texts describe only two types of EDM pulse generators (EPGs), although there are several different types. This work presents a classification and detailed comparative study of 13 important EPG topologies from the power electronics perspective. The operation of each topology is explained using simulation studies for EDM load with spark current of 10 A and pulse repetition frequency of 1 kHz. Control schemes of each topology are explained from the viewpoint of mechanical performance parameters, viz. material removal rate, surface finish, and tool electrode wear ratio. A general analytical methodology to compute efficiency based on machining duty is illustrated considering the existence of two distinct switching frequencies. Overall comparison between EPG topologies is presented considering control aspects, size, efficiency, voltage stresses and suitability for any required application. As an example, a case of investigation of cutting silicon ingots with wire EDM is considered and experimental results are provided for the same. This work can be used as a guideline to understand and develop EPG based on particular target specifications.

The aim of this study is to review the state-of-the-art of recent prediction methods for power metal-oxide-semiconductor field-effect transistors (MOSFETs) switching losses using datasheet parameters. A detailed technical literature investigation is carried out to collect the latest research contributions on this subject, pointing out their main features and drawbacks. Then, a particular section is dedicated to compare three different selected methods oriented to Si-based and SiC-based MOS power transistors. This analysis is performed on several voltage and current level ratings using an experimental prototype of a double pulse circuit. According to the experimental-supported study included here, at a particular volt–ampere condition, the Ahmed method provided the lowest theoretical error of 2.38%, while the Guo method attained 41.2% and Brown method presented 28.5%. In addition, according to the experimental results it can be concluded that it is very difficult to obtain a high level of accuracy concerning MOSFET switching losses, mainly due to the uncertainty when selecting datasheet information. Among the parameters that most influence the measurements, one could list the MOSFET transconductance, the channel threshold voltage and the parasitic inductances.

This work proposes the new discontinuous pulse width modulation (DPWM) schemes for an indirect matrix converter (IMC) to reduce the switching losses. The use of discontinuous modulation signals reduces the switching losses of the IMC by reducing the switching counts per cycle of the output converter. The key feature of the proposed schemes is the easy implementation as compared to existing DPWM schemes of the IMC. The major drawback of the existing DPWM schemes is the absence of zero current commutation (ZCC). In the absence of ZCC, the switchings of the input converter are accomplished through four-step commutation which adds the difficulties to the implementation. The proposed scheme overcomes above limitation by using the triangular carrier instead of the sawtooth carrier for the modulation of input converter. Consequently, the ZCC is enabled on the input converter which allows the use of two-step commutation. The two-step commutation simplifies the implementation to a great extent. The presented scheme provides the required input/output performance similar to continuous PWM (CPWM) schemes. The proposed work is verified by the simulation and experimental results. The reduction in the switching losses of the IMC by the new scheme is verified based on the comparison with the CPWM scheme.

This study presents a hybrid multilevel inverter (HMLI), capable of generating 19 voltage levels using a single DC voltage source. The peak inverse voltage of all the switches is restrained within the input DC source voltage in the proposed HMLI, which requires only three capacitors and 15 switches to achieve 19 voltage levels. In the proposed HMLI, one of the capacitors is self-balanced, while the other two capacitors are balanced using a modified finite control set model predictive control (MFCS-MPC). The proposed MFCS-MPC reduces the computation time considerably without affecting the performance of the system. The proposed HMLI is compared with some other HMLI topologies to show its merits in terms of active and passive components. Finally, the steady-state and dynamic performance of the proposed topology and its control algorithm is validated through simulation and experimentation for a 1 kW prototype.

A practical parameter extraction method for physics-based lumped-charge silicon carbide (SiC) merged PiN Schottky (MPS) diode model is presented. The physical parameters of a device model are necessary for accurate simulation but are usually not provided as these parameters are the core business profits of the manufacturers. The values of SiC MPS diode parameters are often based on assumptions or given in a wide range, thus the accuracy of the model simulation is compromised and the application of the model is also limited. The proposed method includes semiconductor physical and structural parameters and only some basic experiments are needed, such as reverse recovery and static characteristic experiments. Based on the lumped-charge SiC MPS diode model, reasonable assumptions are used and simple mathematical formulas are derived for the extraction of the parameters. Finally, the method is validated by two different SiC MPS diodes from CREE and CETC having the ratings of 1200 V/300 A and 3300 V/60 A.

In this study, the integration of buck converter with Cuk converter to achieve a non-isolated high step-down dc–dc converter is investigated. Also, a soft-switching cell is modified and used in the integrated converter to provide zero current switching and zero voltage switching condition for the converter switches at turn-on and turn-off, respectively. The auxiliary cell also eliminates the reverse recovery problem of the converter diodes. As a result, a high efficiency high step-down converter with reduced voltage stress for semiconductor components is derived. The analysis, operational principle and design considerations of the proposed converter are discussed in this study. The accuracy of the converter operation is verified by a 200 W, 155 V-to-24 V laboratory prototype.

Renewable energy resources energy is widely collected from the natural resources of wind, photovoltaic, and geothermal heat energy. Generally, the hybrid system is affected by the unwanted power quality issues such as harmonics, voltage sag, and swell. The proportional resonant (PR) controller is optimised with an Elephant herding optimisation (EHO) algorithm to investigate the dynamic performance of buck–cuk power converters in hybrid renewable energy sources. The proposed power converter is used to regulate the level of voltages by controlling the switching pulse of the converter depending on the duty cycle ratio. An EHO algorithm is employed for tuning the PR controller gain parameters. In the grid side, shunt active power filters are integrated, and the inductor–capacitor–inductor filter is utilised for solving the overshoot and settling time problems. The total harmonic distortion (THD) and steady-state error are reduced by the proposed technique. The proposed system is designed with the help of MATLAB/Simulink platform, and the output response is determined with the simulated results. The dynamic response of the proposed system is examined based on simulated outcomes, and THD comparison analysis is performed with the existing controllers such as proportional–derivative, proportional–integral–derivative, and fuzzy controller.

For a hybrid energy storage system consisting of battery and super-capacitor (SC) in More Electric Aircraft, a decentralised control strategy, which is based on the virtual impedance droop control, can implement the frequency domain allocation of load power avoiding communication delay and a single point of failure. Although the output voltage deviation and state-of-charge (SoC) limitation are solved by existing methods, it still suffers from settling time extending. Secondary voltage controls (SVCs) of virtual-droop-controlled for battery and SC are proposed to solve the issue. SVC for the output voltage is designed to compensate for the output voltage deviation in the battery converter based on virtual resistance droop control. SC converter, which is controlled by the SVC for input voltage in virtual capacitance droop control, enforces SC SoC back to the initial value and maintains consistent settling time. In this study, a set of detailed design methods for the controller parameters of SVC are developed not only to regulate the output voltage and SoC recovery but also to keep the same settling time. The results of the simulation and experiment validate the effectiveness of the proposed SVC and design method.

Light-emitting-diode (LED) drivers are required to maintain the power quality of both the AC input and DC output side. The regulation prevents adverse impacts on the grid and maintains the nominal operating condition of LEDs. Without significant filtering, the input power from a single-phase AC source can result in low-frequency flickers that raise health issues. This study proposes a LED driver topology to achieve low harmonics at the AC side and maintain flicker-free operation to drive LEDs. A novel ripple-cancelling scheme is developed to minimise redundant power processing and reduce circuit complexity to achieve high-conversion efficiency. The new topology supports a simple control strategy to operate the driver effectively. Experimental evaluation demonstrates the system performance and verifies the novelty and contribution.

Impedance characteristics of the floating capacitor in the submodule (SM) of a modular multilevel converter (MMC) change due to its chemical and aging characteristics. This can result in a rise of voltage ripple across SM capacitors, uneven power distribution among the SMs and could also interrupt the operation with prolonged use of degraded capacitors. Existing balancing approaches are presented for the MMC with equal SM capacitance and ignored the effect of capacitor degradation as well as parameter mismatch. Hence, a closed-loop control scheme that incorporates the effect of capacitor degradation is much necessitated. This study aims to overcome this gap by proposing a new power balancing control algorithm for SM capacitors, which effectively controls and evenly distributes the power among SMs. The efficacy of the proposed strategy is substantiated through PLECS simulations and OPAL-RT/OP4510 controller-based experiments on a single-phase MMC laboratory prototype.

Grid-interfaced solar photovoltaic (GIPV) system requires a robust control algorithm for satisfactory operation under grid voltage disturbances. In this study, an application of Newton's learning rule-based total least-square estimation employing single-layer neural network structure is adopted to interface the photovoltaic unit with the utility grid. In addition, the weight-updating mechanism is uniquely integrated with threshold neuron for attaining speedy extraction of fundamental load current component. In particular, the proposed control algorithm has the capability to transfer maximum active power to the utility grid/AC load at unity power factor while operating as distribution static compensator to offer various ancillary services including current harmonics attenuation and reactive current suppression. This will lead to increased device utilisation factor of the overall GIPV system during night time (i.e. in the absence of solar irradiance). Moreover, the proposed control scheme is designed and developed without any complex transformations and derivative terms, which results in less computational intensiveness. The GIPV system with three-phase double-stage configuration is modelled in MATLAB/Simulink software using sim-power system tool. Finally, the adaptability of the proposed control algorithm has been verified and confirmed through 500 W laboratory prototype using low-cost Arm Cortex-M4 microcontroller under various operating conditions.

The application of the metamaterial (MM) in wireless power transfer (WPT) system has received a great deal of attention in improving the transfer efficiency and reducing the leakage of electromagnetic field (EMF) in recent years. However, most of the analytical methods for MM-inspired WPT system are based on microwave technologies, such as negative refraction effect, magnetic dipole coupling model and magneto-inductive wave theory. In this study, the equivalent circuit model of the MM in the WPT system is analysed in detail. Two different types of MMs, Mu-Negative-Magnetic (MNM) and Mu-Near-Zero (MNZ), are constructed to verify this method. In particular, a tuning strategy by changing the distances between the drive (load) loop and internal coils is established to improve the power transfer efficiency for the WPT system with the MNM-MM. In addition, the MNZ-MM is described to cancel EMF leakage in the WPT systems by this method. Moreover, a series of practical experiments are carried out to prove the numerical analysis, which are well consistent with the theoretical solution employed by the Advanced Design System software. Finally, the combination of two types of MMs applied in the WPT system is also discussed.

In this study, the design of the class-E_M­ power amplifier is presented. In this design, the effects of on-state resistance and non-linear parasitic capacitances of the transistors are investigated. Two metal oxide semiconductor field-effect transistors (MOSFETs) of IRFZ24N and IRF510 with different drain-source resistances are used in the presented circuits. In the given design, the values of the operational frequency and duty ratio are 3.5 MHz and 0.5, respectively. This study shows the importance of considering non-linear parasitic elements of MOSFET, especially drain-source resistance in the designing of the class-E_M power amplifiers. It is shown that the class-E_M power amplifier with high MOSFET drain-source resistance needs high DC input voltage for both the primary and auxiliary circuits. In the previous works, non-linear on-state resistance and non-linear drain-source and gate-drain capacitances have not been included at the same time in the analyses. Two class-E_M amplifiers contain IRF510 and IRFZ24N are designed, simulated, and measured. The efficiency equal to 96.6% with 11.851 W output power at 3.5 MHz and the efficiency equal to 88.4% with 12.361 W output power are achieved for presented class-E_M amplifiers contain IRFZ24N and IRF510, respectively.

High-voltage (HV) pulses are widely used in many applications. This study proposes a new HV unipolar pulse generator based on Single-Ended Primary-Inductance Converter (SEPIC) for electroporation applications. The converter in the proposed pulse generator operates in discontinuous conduction mode with continuous input current. The proposed structure uses voltage-boosting modules that are fed from a relatively low voltage DC source with a reduced number of semiconductors. The number of semiconductor devices and the voltage stress across them are important issues for HV pulse generators. The proposed approach does not have any chopping switches at the output stage, which greatly affects cost, efficiency, and system control. The employed semiconductor switches and diodes in the proposed topology have low voltage and current stresses, so the structure can be implemented with the market-available semiconductor technology. Mathematical analysis is presented along with a full design of the system components. Finally, simulation and experimental results are presented to validate the proposed concept.

In this study, a simple carrier-based pulse-width modulation (CBPWM) method is proposed for a three-phase three-level neutral-point-clamped converter with neutral-point (NP) balancing, which can be applied to three-phase three-wire (TPTW) and three-phase four-wire (TPFW) converter systems simultaneously. First, the effect of each switching state for the NP potential in TPTW and TPFW systems is analysed in detail, and a newly NP control strategy by reconstructing the switching state and adjusting the corresponding duration time is deduced for all operation conditions, it only needs to add the offset voltage to the modulation reference voltage to guarantee the NP balance and is easy to implement. Then, under all operating conditions, the mathematical model of NP current is derived and analysed to evaluate the low-frequency voltage oscillation in the NP. Finally, the effectiveness and feasibility of the proposed CBPWM strategy are verified by the experimental results based on a 12 kVA laboratory prototype.

This work presents a new type of high-order LCLCL resonant DC/DC converter. The converter in this study can properly inject the third harmonic for energy transmission through optimal configuration and parameter design of the resonant tank, which can not only achieve a wider voltage regulation range but also provide an easy method for soft start and overcurrent protection. In this study, both switches can realise soft switching, and due to the injection of the third harmonic, the loss of the secondary rectifier diode is reduced. This article describes the working principle of the LCLCL converter and provides the parameter design principle and small-signal modelling method. In the laboratory, a 400 W prototype with 400 V input and 24 V output is built to verify the correctness of the theoretical analysis.

This study proposes a series of high step-up DC/DC converters based on the coupled inductor and switched capacitors. The priority of the switched capacitor connection methods of the converters is presented by their contributions to the voltage gain so that the converters can be selected optimally according to the gain demand. For this converter, the voltage gain can be adjusted by both of the turns ratios of the coupled inductor and the number of switched-capacitor units. It makes it possible to further improve the voltage gain when the turns ratio of the coupled inductor is rather high. Moreover, the introduction of switched capacitors can reduce the voltage stress of power components. In this study, the operating principle and performance characteristics of the converters are analysed. Also, a 300 W prototype is set up for verification. The experimental results demonstrate the effect of the theoretical analysis and superiority of the converter.

This work targets reducing the mode transition time drastically, for two of the bidirectional DC–DC converters (BDCs) employed in energy storage systems, simultaneously proposing a smooth start-up process. Two different mode transition techniques are introduced for topology A (proposed) and topology B, respectively, whose transition times are much smaller than the existing transition techniques. Topologies A and B are capable of performing all basic converter operations, i.e. buck, boost, inverting buck–boost and non-inverting buck–boost in bidirectional mode, which allows the operating voltage ranges of both V ₁ and V ₂ to be increased perceivably. Both topologies are compared based on mode transition methodology, stress on the converter switches, inductor size and rating. A start-up technique is also advocated for both topologies so that the start-up response could be smooth. Two 400 W BDCs are designed with voltage levels of 60 and 120 V and experimentally verified for efficient start-up, mode transition and steady-state operations. Both mode-transition techniques proposed here, take 2 μs for the current reversal on the battery side from +5 to −5 A.

This study proposes a multi-mode fault-tolerant control (FTC) strategy, for cascaded H-bridge multilevel inverters, to provide the most suitable fault tolerance scheme for different single or double arbitrary insulated gate bipolar transistor (IGBT) faults. Firstly, all faulty modes are classified into three fault clusters according to the number and location of faulty IGBTs. Then, the matching mechanism of the multi-mode FTC strategy corresponding to the three clusters is described, and the appropriate FTC algorithm is selected for each cluster. In particular, a new FTC method has been proposed for Cluster I that includes double IGBT fault in different H-bridges and different groups. This method improves the utilisation efficiency of healthy IGBTs in the faulty H-bridges, and minimises the voltage level drop after the fault. Finally, the multi-mode FTC strategy has been applied to a seven-level inverter through simulation. Results have shown significant improvement of the output voltage waveform symmetry and harmonic distortion reduction for the three clusters. The new FTC method has been applied to an experimental five-level inverter. The obtained results confirm the validity of the methodology. With the proposed strategy, the output voltage has a lower harmonic distortion and a better symmetry thanks to the attenuation of the undesirable DC component.

A new high gain step-up dc–dc converter based on modified active switched-inductor (MASL) and switched-capacitor (SC) is proposed in this study. The proposed converter is based on the classical boost topology, in which the inductor is changed by the proposed MASL cell. This new cell allows the addition of more than two switched-inductors (SLs) to the classical boost topology, which is the most significant limitation of conventional active SL. Additionally, in the proposed converter, the output capacitor is replaced by an SC cell, increasing still more the voltage gain of it, which can be higher than 20 without using transformers or coupled inductors, and with lower voltage stress on the semiconductors and high efficiency. The principle of operation, theoretical static and dynamic analysis, design methodology and comparison with other non-isolated topologies present in the literature are approached in this study. The performance of the proposed converter is validated by interesting experimental results obtained from a 200 W prototype with an input voltage of 20 V, an output voltage of 400–600 V, switched frequency at 50 kHz and peak efficiency of 95%.

A strategy for the implementation of the output impedance in single-phase inverters connected in parallel with droop control for uninterruptible power supply applications is proposed in this study. The proposal allows the load current to be distributed in proportion to the power capacity of the inverters connected in parallel, by establishing the magnitude and phase of the output impedance at the fundamental frequency and its harmonics, when the voltage control is performed through odd harmonic repetitive controllers. This is accomplished through the design of an output impedance profile based on the transfer function of a second-order high-pass filter and a virtual impedance loop. The proposal achieves a correct operation of the droop control strategy and the proper sharing of the harmonics of the non-linear load current between the inverters connected in parallel, obtaining reduced values of individual harmonic content and harmonic distortion in the output voltage with reduced processing requirements. The validity of the proposal is verified through a 2 kVA experimental prototype, considering the requirements of the international quality standards IEC62040-3 and IEC61000-2-2, in terms of output voltage regulation, individual harmonic content, and harmonic distortion for inverters operating both in islanded-mode and in parallel.

This study proposes an optimised controllable pulse-width modulation (PWM) scheme suitable for multilevel inverters. Seeing the need for improving the output voltage characteristics such as total harmonic distortion, low-order harmonic and distortion factor, an improved harmonic injection PWM variable frequency triangular carrier modulation technique is employed for off-line mode. For this purpose, the carrier signal frequencies at each level (carrier-based), and also amplitudes and orders of the harmonic-injected signal (reference-based) are considered as controllable parameters. The proposed technique benefits are operating with considerably fewer numbers of the pulses per cycle, low switching losses, and improvement in the output voltage characteristics. However, selective harmonic elimination and optimal switching angles are the most common modulation techniques, but they employ only one angle as a control parameter at each level of the output waveform. Hence, the modulation scheme can consider more angles at each level as controllable parameters by applying multi-objective particle swarm optimisation and non-dominated sorting genetic algorithm II (NSGA-II). Simulations are conducted in 5-, 7- and 9-level inverter. Finally, the effectiveness of the studies is validated by obtaining experimental results on a single-phase 1 kW 7-level inverter prototype.

Some configurations of universal active power filter (UAPF) with uninterruptible power supplies (UPSs) features for single-phase applications are proposed in this study focus on a reduced number of power electronic switches. All proposed configurations, composed by two-leg converters, compensate for current and voltage harmonics and provide power factor control close to one. Comparisons between the structures are made in terms of converters voltage capabilities, shared-leg, and capacitor currents. The model of the systems, including the equations and control system, is detailed described. Steady-state analysis of the proposed configurations demonstrates the existence of a load angle, which reduces the converters current, increasing the efficiency of the proposed systems. A complete set of simulated and experimental results are presented.

In this paper, an improved modulated model-predictive control (MMPC) scheme is proposed for the current control of permanent magnet synchronous motors (PMSMs). Different from the existing MMPC based motor current control schemes which simply feed the resultant voltage vectors calculated by the finite-control-set model predictive control (FCS-MPC) to the SVPWM module and could not adjust the current control bandwidth, the principle of the proposed MMPC current control scheme is to control the current vector along a predefined trajectory and the resultant current vector is expected to equal the reference current vector at the end of the predictive horizon. Therefore, the control bandwidth of the proposed MMPC can be easily adjusted via the predictive horizon, and the transient performance of the current control can be improved without current overshoot. Moreover, different from existing MMPCs, the proposed control scheme does not need to predict all the resultant currents generated by the basic voltage vector combinations of the six voltage sectors, but only needs to predict the resultant currents generated by the basic voltage vector combinations of three voltage sectors. Therefore, the computational burned is significantly reduced.

In this study, a novel energy management strategy (EMS) with two degrees of freedom is proposed for hybrid energy storage systems consisting of supercapacitor (SC) and battery in islanded microgrids. The proposal introduces two degrees of freedom including an adaptive high-pass filter cut-off frequency f _c and a charge/discharge coefficient k _b, according to the SC and battery state of charge (SOC), respectively. The f _c regulates SC current in the transient process and the k _b controls battery current in the steady-state. Therefore, appropriate power distribution that the SC suppresses the transient power fluctuations while the battery supports average power demand is realised, over-charging, and over-discharging are avoided and the current stress of the battery during the shut-down process is reduced. Moreover, three operation modes for isolated DC microgrids, comprising power-sharing mode, battery-only mode, and extreme mode are demonstrated. Hence, the DC microgrid can remain stable for the whole time, achieve seamless transitions from the power-sharing mode to the two others, and provide faster SOC recovery of the SC. The effectiveness of the proposed EMS is validated by experimental studies with a prototype of the simplified DC microgrid.

In this study, using robust and adaptive approaches, two controllers are designed to compensate for the applied load and input voltage uncertainties of a high voltage gain dc–dc converter. These controllers are designed based on measuring only the output voltage of the converter. The permissible ranges of the uncertainties are calculated using dynamics equations analysis while practical limitations are considered. In the first approach, an input multiplicative uncertainty is considered for the model of the converter by linearisation of non-linear equations as well as using permissible ranges of the uncertainty. Then, a robust H_∞ controller is designed. In the second approach, the converter model is considered as a first-order dynamics model with the unknown parameters and an unknown additive term while a direct robust model reference adaptive controller is designed for it. Finally, the non-linear equations of the converter are simulated and the performances of the controllers are compared with each other. The control methods are then implemented on a 200 W prototype of a converter for evaluating the simulations results.

This work analyses the effects on the efficiency of the winding-to-winding capacitance of the coupled-inductor of the bidirectional non-inverting buck–boost converter in high-voltage applications. This converter presents many advantages that make it suitable for low-voltage hard-switching photovoltaic and fuel cell hybrid systems. However, experimental results obtained using the previously reported procedure to implement the coupled inductors show low-efficiency in high-voltage applications. A different implementation procedure of the coupled inductors, with lower winding-to-winding capacitance, is proposed. High-efficiency experimental results from a 400 V 1.6 kW prototype have been achieved over a wide operating voltage range, thanks to the use of SiC devices and the modified coupled inductors, confirming in this way its good potential as a building block also in high-voltage wide-gain-range applications.

In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype.

The major issue with the three-level active neutral point clamped (ANPC) inverter has been the requirement of a higher DC-link voltage with a lower peak of the output voltage. In this study, a new unity gain ANPC multilevel inverter topology has been proposed with a lower number of switches. The proposed topology generates a nine-level output voltage with a single DC voltage source, four capacitors, and ten switches. The two floating capacitors have a voltage rating of 0.25V _dc which reduces the overall cost and improves the efficiency of the topology. The performance of the proposed topology has been demonstrated using various comparisons and experimental results.

This study proposes a new switched-capacitor-based multilevel inverter topology with a single dc voltage source. The proposed topology finds its suitability for renewable energy applications with low voltage. Seven-level (7L) output voltage is achieved across the load with triple-voltage gain employing 2 capacitors and 12 switches. Self-voltage balancing of capacitor voltages, parallel operation of capacitors during discharging mode, reduced voltage stress, and bipolar output voltage generation without using backend H-bridge are the major features of the proposed topology. Furthermore, a generalised structure of the proposed topology has also been discussed here. A comparison with other similar topologies with single-source 7L configuration has been carried out to show the advantages of the proposed topology with reduced switch count. Experimental results have been provided to verify the performance of the proposed topology with different operating conditions.