Advantages of the modular multilevel converter (MMC) such as modularity, scalability, fault-tolerant ability, low device switching frequency, transformerless grid connection etc. have made it the most promising converter topology for medium-to-high-voltage, high-power applications. However, in MMC-based medium-voltage drives, the excessive fundamental-frequency submodule capacitor voltage ripple at low speeds or start-up poses a major technological challenge. A lot of low-frequency ripple suppression methods have been proposed to address this problem. This study summarises the state of the art in this area and classifies these methods into three categories. The pros and cons of them are discussed. An in-depth analysis of these methods from a practical viewpoint is given. Some future research trends are also discussed.

A control strategy to achieve fault ride-through capability and to provide high performance of the output voltage of a single-phase uninterruptible power supply (UPS) inverter is proposed in this study. This strategy consists in controlling the voltage and current waveforms measured at the inverter output filter, with an inner current control loop and an outer voltage control loop, using a plug-in structure based on multiple resonant stages in addition with proportional controllers. In order to achieve stability from no load to short-circuit conditions, the implementation of the multiple resonant controllers includes a compensation of the system phase lag. Moreover, it presents a comparative analysis between two controller structures, the proposed plug-in and the classical proportional + resonant. From this analysis, it can be concluded that the plug-in structure presents improved characteristics of closed-loop output impedance and output voltage dynamic response during fault ride-through events. A controller design methodology to achieve robustness to parametric uncertainties and UPS standard compliance, is detailed. Experimental results from a single-phase 2 kVA inverter prototype are presented to validate the feasibility of the proposal.

The current stress of three-level dual active bridge (3L-DAB) converter under the conventional phase shift (CPS) control becomes much high, especially when the voltage conversion ratio is unequal to one, which may bring low efficiency and damage of power devices. An optimised phase shift (OPS) control strategy is presented to address the issue. The OPS control is realised by calculating the optimal operation point with real-time detection of voltages and current. The principle of 3L-DAB under CPS control is presented. The mathematical models of transmission power and current stress are then established. The minimum current stress and the corresponding optimal phase shift ratios are deduced within different ranges of transmission power and voltage conversion ratio, the comparative analysis of current stress and reflux power under OPS and CPS controls have been carried out. The current stress is minimised with any given transmission power and voltage conversion ratio in the whole power range after adopting the OPS control strategy. Moreover, the reflux power is reduced as well within the boundary of voltage conversion range. An experimental prototype was developed to verify the effectiveness of the proposed control strategy and the correctness of the theoretical analysis.

Light emitting diode (LED) lighting is widely used in current. However, lighting robustness is low in a series loop since the lighting shuts down as one LED fails. This study proposes a power chip for fault detection and isolation for enhancement of LED's fault-withstanding capability. The chip can automatically detect the failed LEDs and bypass them, and let others continue to work. The authors implemented four bypass loops using a power metal oxide semiconductor (MOS) on the single chip. This chip can drive 1 A with 4-bit current dimming, which includes four bypass power P-type MOSs, one power N-type MOS, schedule controller, level shifter and over voltage protection. The schedule controller with a state machine can quickly find which one LED fail and recover it soon. The prototyping chip was designed using TSMC 0.25 μm, which is the second generator high-voltage technology, and the resulting chip area with pads is only 1.3 × 1.7 mm². The chip had been successfully implemented and measured to drive and bypass four LED components or modules.

Transformerless inverter for grid-tied photovoltaic (PV) system has been widely used due to lower cost, higher efficiency and lighter weight. Various transformerless inverter topologies have been proposed to meet the safety requirement of low leakage current and obtain the reactive power capability. To get better performance, a novel transformerless hybrid-H6 inverter with an improved modulation technique is proposed in this study. By adopting the improved modulation technique, two symmetry paths are realised to share the current during the freewheeling mode. Thus, without paralleling any additional capacitors to the switch, the inverter can reduce the influence of junction capacitance on common mode voltage naturally which results in mitigating the leakage current issue. Thanks to the dead time reduction through the improved modulation, the qualities of output waveforms are improved. Moreover, reactive power control is achieved without any modification of the inverter structure. Finally, a 1 kW prototype is simulated and tested to verify the theoretical analysis of this study. Not only the reactive power capability is obtained for the proposed inverter, but also the small common mode voltage fluctuation is achieved at the same time. In addition, the total harmonic distortion of the current is decreased by more than 1.7%.