High frequency industrial induction heating processes typically employ resonant inverters to reach high efficiency at high power levels. Advancements in wide band gap (WBG) device technology has made it feasible to push the possible frequency of these processes into the MHz regime using solid state technology. Several topologies can be applied, each with advantages and drawbacks. This paper presents a current source resonant inverter (CSRI) employing a custom designed power module utilizing 1700V SiC MOSFETs for MHz operation of a high‐Q resonant tank for induction heating, which presents new challenges in the inverter module design. An integrated gate driver structure is demonstrated driving four MOSFETs in parallel in MHz operation. Theoretical analysis predicts substantial parasitic influence on inverter operation, and thus an inverter is constructed to provide experimental verification of MHz operation, while the challenges associated with high frequency CSRI operation are discussed. In the experimental inverter setup, the fabricated power module achieves efficiency for a calculated reactive power of 170 kVA and 2.3 kW output power during unloaded operation, validating the inverter design for extension to higher power loaded operation.

In droop‐controlled DC microgrids, parasitic resistances of long conductive lines introduce additional terms for the power calculation and impact the power sharing accuracy. This paper proposed a comprehensive local control design for enhancing power sharing accuracy and restoring DC bus voltage while increasing stability performance in DC microgrids. A passive controller is used in the primary control to ensure the sufficient bandwidth of controller in case of frequent operation modes alteration and voltage deviation in the DC microgrid. A concept of Virtual Negative Line Resistance (VNLR) is used in the secondary control layer to compensate the real line resistance such that line resistance no longer degrades power sharing accuracy. The common DC bus voltage needs to be monitored in the proposed secondary controller. Simultaneously, the common DC bus voltage can be restored as the designed value. The monitored DC bus voltage signal is filtered by a designed low‐pass filter such that mid‐high frequency dynamics can be decoupled between secondary controls and primary controls. Then the entire local control scheme relaxes three Degrees of Freedom (DoF) which can be used for upper layer controls. Finally, the proposed control method has been experimentally validated in a 50 V DC microgrid laboratory testing system.

This paper focuses on design of a control system for full bridge DC‐DC converter based on Lyapunov stability theorem which guarantees system stability. To achieve this goal, a full bridge DC‐DC converter is used as a Li‐ion battery charger and sinusoidal ripple current (SRC) is implemented as the charging algorithm. In initial step, state space equation of the system including DC‐DC converter and battery are obtained. After that, switching function is extracted by applying Lyapunov stability theorem to state space equation. Also in order to achieve unity power factor and allowable current Total Harmonic Distortion (THD) range based on standards, an Active Front End (AFE) PWM Rectifier is used. To evaluate the effectiveness of the proposed controller scheme, a laboratory prototype is implemented. Experimental result shows appropriate performance of proposed controller in tracking of reference values in comparison with fixed PI controller. In addition, results of AFE rectifier performance is evaluated by showing the unity power factor and low THD value.

This study proposes a new interleaved high step‐up topology based on cross‐coupled inductors and voltage multiplier cells (VMCs). Two series capacitors in VMC are employed to raise voltage gain and diminish peak voltage across switches. Thus, low voltage MOSFETs with low on‐resistance (R) can be used in the proposed converter. Due to the presence of the leakage inductors in coupled inductors, the falling rate of the output diodes current is controlled and the diode recovery current problem at turn‐off can be mitigated. In addition, switches are turned on under ZCS conditions which results in efficiency improvement. Using two‐phase topology reduces input current ripple and shares power losses between each phase. The converter is analyzed and its operation is investigated using detailed comparisons. Finally, to confirm the performance of the proposed converter, a 30 V input voltage to 400 V output voltage prototype with the rated power of 220 W is implemented and tested in the laboratory.

Overcurrent failure caused by imbalanced current distribution is one of the universal failure forms of the SiC MOSFET module. The current sharing of parallel SiC MOSFETs is an important guarantee for the safe and reliable operation of parallel devices even the whole system. The existence of current coupling has a significant influence on the current sharing among paralleled SiC MOSFETs. Here, the mechanism of dynamic and static current imbalance under the different layouts resulting from current coupling generated by common branch impedance coupling and mutual inductance is comprehensively investigated by theoretical analysis and simulation validations. It is concluded that dynamic current imbalance is more serious when the drain confluence point and power source confluence point are on both sides than they are on the one side. While, the influence of the arrangement of two confluence points on the static current distribution is in reverse. Finally, a flexible and adjustable test bench is designed to verify the current sharing performance on the different layouts. The experimental results validate the correctness of the theoretical analysis. Based on these results, some guidelines are provided for the parallel‐connected application of SiC MOSFETs.