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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 6, Issue 4, July 2012

Volume 6, Issue 4

July 2012

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    • Arithmetic module-based built-in self test architecture for two-pattern testing
      Multi-objective optimisations for a superscalar architecture with selective value prediction
      Efficient post-configuration testing of an asynchronous nanowire crossbar system for reliability
      Functional broadside tests for embedded logic blocks
      Reset and partial-reset-based functional broadside tests
      Design of experiments and integer linear programming-assisted conjugate-gradient optimisation of high-κ/metal-gate nano-complementary metal-oxide semiconductor static random access memory
      FPGA accelerator for floating-point matrix multiplication

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