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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 5, Issue 5, September 2011

Volume 5, Issue 5

September 2011

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    • Variability compensation for full-swing against low-swing on-chip communication
      Advanced calibration techniques for high-speed source–synchronous interfaces
      Low energy multi-stage level converter for sub-threshold logic
      Reordering the assembly instructions in basic blocks to reduce switching activities on the instruction bus
      Improving the speed of decimal division
      Sizes of test sets for path delay faults using strong and weak non-robust tests
      Ranking of input cubes based on their lingering synchronisation effects and their use in random sequential test generation

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