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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 3, Issue 6, November 2009


Volume 3, Issue 6

November 2009

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    • Editorial: Advances in nanoelectronics circuits and systems
      Connecting fabrication defects to fault models and SPICE simulations for DNA self-assembled nanoelectronics
      Defect-tolerant N2-transistor structure for reliable nanoelectronic designs
      Is triple modular redundancy suitable for yield improvement?
      Hybrid NEMS–CMOS integrated circuits: a novel strategy for energy-efficient designs
      Low-power hybrid complementary metal-oxide-semiconductor-nano-electro-mechanical systems field programmable gate array: circuit level analysis and defect-aware mapping
      Inversion schemes for sublithographic programmable logic arrays
      Adaptive error control for nanometer scale network-on-chip links

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