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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 2, Issue 2, March 2008

Volume 2, Issue 2

March 2008

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    • Low-power and real-time address translation through arithmetic operations for virtual memory support in embedded systems
      Embedding torus in hexagonal honeycomb torus
      Energy reduction of the fetch mechanism through dynamic adaptation
      Comparative study of centralised and distributed compatibility-based test data compression
      Simultaneous scheduling and binding for low gate leakage nano-complementary metal-oxide-semiconductor data path circuit behavioural synthesis
      Simultaneous capture and shift power reduction test pattern generator for scan testing
      High-performance embedded branch predictor by combining branch direction history and global branch history

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