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Online ISSN 1751-861X Print ISSN 1751-8601

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Volume 14, Issue 6, November 2020

Volume 14, Issue 6

November 2020

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    • Ten years of hardware Trojans: a survey from the attacker's perspective
    • Efficient VLSI architectures of lifting based 3D discrete wavelet transform
      Optimised HEVC encoder intra-only configuration
      Rectilinear routing algorithm for crosstalk minimisation in 2D and 3D IC
      Network-on-chip heuristic mapping algorithm based on isomorphism elimination for NoC optimisation
      Technique for two-dimensional nearest neighbour realisation of quantum circuits using weighted look-ahead
      Real-time speech enhancement using optimised empirical mode decomposition and non-local means estimation
      Power efficient error correction coding for on-chip interconnection links
      Efficient parallelisation of the packet classification algorithms on multi-core central processing units using multi-threading application program interfaces
      Automated planning for finding alternative bug traces
      In memory computation using quantum-dot cellular automata
      High throughput and area-efficient FPGA implementation of AES for high-traffic applications
    • Towards IP integration on SoC: a case study of high-throughput and low-cost wrapper design on a novel IBUS architecture

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