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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 13, Issue 4, July 2019

Volume 13, Issue 4

July 2019

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    • Multi-objective optimisation algorithm for routability and timing driven circuit clustering on FPGAs
      F 2 m " >Efficient hardware structure for extended Euclidean-based inversion over
      Mitigating information leakage during critical communication using S*FSM
      Exploiting memory allocations in clusterised many-core architectures
      High throughput fault-resilient AES architecture
      KBMA: A knowledge-based multi-objective application mapping approach for 3D NoC
      DICA: destination intensity and congestion-aware output selection strategy for network-on-chip systems
      Building an accurate hardware Trojan detection technique from inaccurate simulation models and unlabelled ICs

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