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Online ISSN 1751-861X Print ISSN 1751-8601

access icon free IET Computers & Digital Techniques

Volume 10, Issue 5, September 2016

Volume 10, Issue 5

September 2016

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    • Guest Editorial
      A New Squarer design with reduced area and delay
      Implementation of MIMO data reordering and scheduling methodologies for eight-parallel variable length multi-path delay commutator FFT/IFFT
      σ n LBDR: generic congestion handling routing implementation for two-dimensional mesh network-on-chip
      Efficient two phase heuristic routing technique for digital microfluidic biochip
      Multiple parallel assay operations with cross contamination avoidance in a given biochip
      Analysis and design of moderate inversion based low power low-noise amplifier
      Mechanically coupled ring-resonator filter and array (analytical and finite element model)
      Fabrication and characterisation of Al gate n-metal–oxide–semiconductor field-effect transistor, on-chip fabricated with silicon nitride ion-sensitive field-effect transistor
      Electronic characterisation of atomistic modelling based electrically doped nano bio p-i-n FET

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