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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 10, Issue 1, January 2016


Volume 10, Issue 1

January 2016

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    • Accuracy-aware processor customisation for fixed-point arithmetic
      Static test compaction for circuits with multiple independent scan chains
      Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2 m )
      Majority-based evolution state assignment algorithm for area and power optimisation of sequential circuits
      Adaptively weighted round-robin arbitration for equality of service in a many-core network-on-chip

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