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Online ISSN 1751-8598 Print ISSN 1751-858X

IET Circuits, Devices & Systems

Volume 5, Issue 1, January 2011

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Volume 5, Issue 1

January 2011

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    • Linearity improvement of open-loop NMOS source-follower sample and hold circuits
      • Author(s): A.N. Shirazi ; S.A. Mirhaj ; S.J. Ashtiani ; O. Shoaei
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 1 –7
      • DOI:  10.1049/iet-cds.2009.0312
      • Type: Article
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      • p. 1 –7 (7)
        A new open-loop sample and hold (S/H) circuit is proposed for high-speed sampled data applications. The open-loop S/H circuit uses the source-follower configuration, for its high speed, low power consumption, small area and low circuit complexity. In order to achieve high linearity, a body effect cancellation technique is proposed which is based on proper modulation of the bias current of the source-follower transistor. Simulated by HSPICE with a standard BSIM3v3 0.18 µm CMOS technology, the pseudo-differential open-loop S/H achieves over 76 dB spurious free dynamic range (SFDR) for a 1.6 Vppd output at 200 MHz sampling frequency. The S/H dissipates 12.5 mW power from a 1.8 V supply.
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      Xampling: analog to digital at sub-Nyquist rates
      • Author(s): M. Mishali ; Y.C. Eldar ; O. Dounaevsky ; E. Shoshan
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 8 –20
      • DOI:  10.1049/iet-cds.2010.0147
      • Type: Article
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      • p. 8 –20 (13)
        The authors present a sub-Nyquist analog-to-digital converter of wideband inputs. The circuit realises the recently proposed modulated wideband converter, which is a flexible platform for sampling signals according to their actual bandwidth occupation. The theoretical work enables, for example, a sub-Nyquist wideband communication receiver, which has no prior information on the transmitter carrier positions. The present design supports input signals with 2 GHz Nyquist rate and 120 MHz spectrum occupancy, with arbitrary transmission frequencies. The sampling rate is as low as 280 MHz. To the best of the authors' knowledge, this is the first reported hardware that performs sub-Nyquist sampling and reconstruction of wideband signals. The authors describe the various circuit design considerations, with an emphasis on the non-ordinary challenges the converter introduces: mixing a signal with a multiple set of sinusoids, rather than a single local oscillator, and generation of highly transient periodic waveforms, with transient intervals on the order of the Nyquist rate. Hardware experiments validate the design and demonstrate sub-Nyquist sampling and signal reconstruction.
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      Accelerating identification of custom instructions for extensible processors
      • Author(s): T. Li ; W. Jigang ; Y. Deng ; T. Srikanthan ; X. Lu
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 21 –32
      • DOI:  10.1049/iet-cds.2010.0073
      • Type: Article
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      • p. 21 –32 (12)
        Extensible processors are increasingly becoming popular as they allow for incorporating custom instructions to meet design constraints. Identifying custom instructions is a time-consuming process particularly when large applications are considered. In this study, efficient techniques for identifying custom instruction candidates are proposed. New pruning criteria are introduced and combined with the latest work cited in the literature to accelerate the identification process. The proposed techniques have been shown to be capable of enumerating all valid patterns corresponding to given micro-architectural constraints with reduced search space. Experimental results show that, the proposed algorithm is capable of reducing the runtime by up to 50% for the case of single-output constraint, and by up to 44% for the case of multiple-output constraint. In addition, an approximation algorithm is also proposed to select the valid pattern that provides for maximum gain in execution of applications. In particular, the proposed algorithm focuses on the promising candidates, instead of enumerating all valid patterns as was the case in previous algorithms. It has been shown to be capable of obtaining the optimal valid pattern for most cases of I/O constraints and the runtime has been reduced by up to 90% for some I/O constraints.
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      New low-voltage full wave rectification technique without a diode
      • Author(s): P.P. Sahu ; M. Singh ; A. Baishya
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 33 –36
      • DOI:  10.1049/iet-cds.2010.0155
      • Type: Article
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      • p. 33 –36 (4)
        Applications like signal detectors and sample and hold circuits in communication are dependent on low-voltage rectification. Normally, a diode is used as a rectifier having the drawback of rectification at a voltage below its threshold voltage. Here, the authors have proposed a new technique of full wave rectification without diodes operating at low input voltage and implemented on a printed circuit board. The circuit gives a dc output voltage almost same as peak input voltage with low harmonic distortion. The oscilloscope trace shows the output signal ∼98 mV with ripple voltage 1 mV obtained with input voltage of amplitude, 100 mV at frequency 100 kHz.
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      Direct search approach to integrated circuit sizing for high parametric yield
      • Author(s): G. Cijan ; T. Tuma ; Á. Bűrmen
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 37 –45
      • DOI:  10.1049/iet-cds.2010.0094
      • Type: Article
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      • p. 37 –45 (9)
        This study proposes a gradient-free approach to integrated circuit sizing that takes into account the statistical variations of device parameters and ranges of operating conditions. A novel gradient-free algorithm for solving the worst-case performance problem is proposed. The proposed algorithm produces corners that are used in the optimisation loop of the circuit sizing process. The set of corners is dynamically updated during circuit sizing. The number of corners is kept low by considering only corners that are sufficiently unique. The final result is a circuit exhibiting the specified parametric yield. The proposed approach was tested on several circuits and the results were verified with Monte–Carlo analysis and worst-case distances. All resulting circuits were obtained in up to 12 h on a single processor and exhibited the specified yield. The method can easily be parallelised to an extent that can bring the runtime of the method in the range of an hour or less.
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      Frequency-domain evaluation of the adjoint Floquet eigenvectors for oscillator noise characterisation
      • Author(s): F.L. Traversa  and  F. Bonani
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 46 –51
      • DOI:  10.1049/iet-cds.2010.0138
      • Type: Article
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      • p. 46 –51 (6)
        The calculation of orbital fluctuations and of the phase-orbital correlation within Floquet-based noise analysis of autonomous systems requires the availability of all the direct and adjoint Floquet eigenvectors associated with the noiseless limit cycle. Here the authors introduce a novel numerical technique for their frequency domain determination. The algorithm is entirely based on the Jacobian matrices already available from the harmonic balance-based calculation of the limit cycle, thus avoiding any time-domain integration. The Floquet eigenvalues and adjoint eigenvectors are calculated from a generalised eigenvalue problem, thus making the approach readily implementable into CAD tools provided that the Jacobian matrices are made available.
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      Alpha-particle-induced effects in partially depleted silicon on insulator device: with and without body contact
      • Author(s): S.S. Rathod ; A.K. Saxena ; S. Dasgupta
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 52 –58
      • DOI:  10.1049/iet-cds.2010.0080
      • Type: Article
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      • p. 52 –58 (7)
        With the continuous downscaling of CMOS technologies, reliability has become one of the major bottlenecks in the evolution of next generation systems. The radiation-induced soft errors have become one of the most important and challenging failure mechanisms in the modern semi-conductor devices. The authors present an in-depth analysis of alpha-particle-induced effects in deep submicron partially depleted silicon on insulator (PD-SOI) device. Device with body contact as well as device without body contact is analysed. The process and device simulations are done with the latest models. Electrical parameter extraction under different energies of an alpha particle is carried out.
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      Variable gain amplifier circuit using titanium dioxide memristors
      Low-voltage low-power rail-to-rail low-Rx wideband second generation current conveyor and a single resistance-controlled oscillator based on it
      • Author(s): H. Moradzadeh  and  S.J. Azhari
      • Source: IET Circuits, Devices & Systems, Volume 5, Issue 1, p. 66 –72
      • DOI:  10.1049/iet-cds.2010.0178
      • Type: Article
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      • p. 66 –72 (7)
        This study presents a novel rail-to-rail second generation current conveyor (CCII) based on quasi-floating gate transistors. The circuit operates at very low supply voltage (±0.5 V), dissipates ultra-low standby power (27 µW), has very high bandwidth (f−3 dB of 191 and 181 MHz for Ai and Av, respectively) and low input resistance (1.5 Ω). Most favourably, its total harmonic distortion is −69 dB at an input voltage of 99% of power supply and frequency of 100 KHz. HSPICE simulation results confirm the feasibility and the robustness of the presented CCII against process variations (worst-case parameters) and temperature variation. Performance of this CCII is verified using a low-power grounded-capacitor single resistance-controlled oscillator.
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