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Online ISSN 1751-8598 Print ISSN 1751-858X

IET Circuits, Devices & Systems

Volume 13, Issue 4, July 2019

Volume 13, Issue 4

July 2019

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    • All-digital delay line-based time difference amplifier in 65 nm CMOS technology
      Assessment of interface traps in In0.53Ga0.47As FinFET with gate-to-source/drain underlap for sub-14 nm technology node to impede short channel effect
      Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET
      LDPC check node implementation using reversible logic
      Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects
      Ultra-low-voltage GDI-based hybrid full adder design for area and energy-efficient computing systems
      Singular perturbation-based model reduction of power electronic circuits
      Tunable flux-controlled floating memristor emulator circuits
      Programmable CCCII: reliability analysis and design methodology
      Low-power low-data-rate IR-UWB transmitter for paediatric apnoea monitoring system
      Design of a charge amplifier for a low-power respiration-monitoring system
      Generation of four states in MOSFET for future multivalued logic circuit design
      Effects of asymmetric underlap spacers on nanoscale junctionless transistors and design of optimised CMOS amplifiers
      Drain current modelling of double gate-all-around (DGAA) MOSFETs
      High-speed sub-threshold operation of carbon nanotube interconnects
      Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis
      Improved nanoscale field effect diode
      Design and development of memristor-based RRAM
      Observation of robust chaos in 3D electronic system
      Design of Doppler parameters estimation circuit

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