Induction heating is regarded as a clean cooking technology, whose prominent advantages include contactless energy transfer, controllable heating rate, and safety. In household applications, it is expected that this approach is supposed to replace conventional gas stoves aiming at a more sustainable future. The increase of energy consumption associated with this trend cannot be neglected, while distributed generation (DG) stands out as a prominent solution to mitigate the impact on the power system. In this context, this work presents an induction heating system consisting of the integration of power electronic converters and a grid-connected photovoltaic (PV) system. Based on existing solutions available in the literature, it is possible to supply the induction stove with two distinct energy sources: the ac grid and PV modules. A high-voltage step-up dc–dc boost converter is employed to create a dc link responsible for connecting the PV system to the grid. The dc link is also used to supply a class DE parallel resonant inverter associated with the induction stove, which requires a low component count. Besides, the PV modules are capable of providing up to 3 kW under standard test conditions. Thus, part of the generated energy is used to supply the heating system, while the remaining portion is injected into the grid. Simulation results are presented to assess the performance of the whole system in steady-state and transient conditions, demonstrating that it is capable of operating at the maximum power point and injecting nearly sinusoidal currents with high power factor.

Lithium battery has become the main power source of new energy vehicles due to its high energy density and low self-discharge rate. In the actual use of the series battery pack, due to the internal resistance and self-discharge rate of batteries and other factors, inconsistencies between the individual cells are unavoidable. Such inconsistencies will reduce the energy utilisation rate and service life of the battery pack, and even endanger the safety of the battery systems. To improve the consistency of the series battery pack, a novel balancing method based on the flyback converter is proposed in this study. The flyback converter with a simple and reliable structure is used to realise the energy transfer between the whole battery pack and any single cell. Compared with the traditional balancing topology, the topology proposed in this study reduces the number of components and the volume of the balancing system, and only needs one set of control signals on the converter primary side, thus reducing the control difficulty. The experimental results show the effectiveness of the novel balancing method.

In this work, a frequency reconfigurable broadband radio frequency-predistorter (BB RF-PD) is proposed that can effectively suppress the power amplifier (PA) intermodulation distortion from 200 MHz to 2.5 GHz. It is an attractive lineariser solution for radio repeaters in long distance communication, where baseband information is not readily available. For broadband signals, existing linearisation techniques become intractable due to high cost and power consumption. The proposed BB RF-PD eliminates the use of data converters, field programmable gate arrays, but still provides the well-intentioned linearisation using the passive components. Three application scenarios have been investigated – (i) and (ii) intra-band: 160 MHz long-term evolution (LTE) signal and 100 MHz two-tone signal, and (iii) inter-/multi-band: two-component carrier LTE signal with frequency spacing of 1 GHz. For verification, the proposed BB RF-PD is implemented with a 10 W HMC8500 PA and tested using 160 MHz signal at 1.8 GHz. It delivers an adjacent channel power ratio (ACPR) of −45.65 dBc with an improvement of 16.87 dB, while for inter-band scenario a new technique has been devised for multiband communication, which is known as BB multipath RF-predistorter. It delivers an ACPR of −50 and −47 dBc for lower and upper CC, respectively.

A small-signal model is established for the basic constant voltage (CV) flyback converter firstly. Then the phase margin and the bandwidth, which can reflect the system stability and rapidity, are deduced through transfer function. The parameters affecting the stability of the system can be obtained by the model's derivation to confirm the appropriate external capacitance value. To improve the precision of CV, the compensation of cable is implemented through the module of irrigation current, pulling down the output voltage under any load conditions to the value of it with the maximal load. The prototype for the proposed CV converter has been fabricated in an MXIC 0.8 μm L80A1 process. The minimal static power consumption measured by a test is only 40 mW. In the CV mode, the precision of the output voltage can reach the level of ±1.5%. Therefore, the proposed control chip has a promising application in low power CV AC–DC flyback converter.

This study presents an all-digital power-efficient integrating frequency difference-to-digital converter (iFDDC) and explores its applications in gigahertz (GHz) frequency-locking. The iFDDC utilises a bi-directional gated delay line (BDGDL) to detect and accumulate the frequency difference between two GHz signals and digitises the result with ultra-low power consumption. The built-in integration of the iFDDC ensures that the in-band quantisation noise of the BDGDL and digital controlled oscillator (DCO) is first-order suppressed. The all-digital realisation of the iFDDC makes it fully compatible with technology scaling. The effectiveness of the proposed iFDDC is verified using the simulation results of a 5 GHz frequency-locked loop designed in a Taiwan Semiconductor Manufacturing Company (TSMC) 65 nm 1.2 V complementary metal-oxide-semiconductor (CMOS). The iFDDC consumes only 474 µW, offering the lowest power/frequency efficiency among reported FDDCs. The DCO locks to 5 GHz reference in <10 cycles.