This Letter presents a novel relaxation oscillator with integrated voltage and current reference circuit, which generates a 32 kHz clock reference with 1% accuracy and has total power consumption of 122 nW at 1 V. Its temperature coefficient (TC) is 104 ppm/°C with a temperature range of −40 to 100°C, and its supply voltage accuracy is 1.6%/V from 1 to 1.8 V. The proposed oscillator uses the voltage reference directly to compare with the charging capacitor voltage, and the charging current is derived from the voltage reference divided by one temperature-independent resistor. The advantages are that the accuracy of output frequency and TC can be trimmed simultaneously and independently. It is fabricated in 0.18 μm CMOS technology and occupies 0.059 mm² including the voltage and current reference circuits.

Single switched-capacitor and series LC resonant converter-based active voltage balancing circuit are presented in this Letter. This converter is proposed to balance the cell voltage in series-connected electrochemical energy storage devices namely battery or supercapacitor. This balancing circuit directly transfers the energy from higher capacitive energy storage cells to lower energy storage cells in the string. It realises the maximum energy recovery and zero voltage gap between the cells and overcomes the drawback of switching loss, conduction loss, balancing time duration, and the voltage difference between the cells of conventional switched-capacitor as well as single LC converter. The details of the balancing circuit operation, theoretical, and mathematical analysis are presented. The experimental result demonstrated that the balancing circuit result where the voltage difference is 451–0 mV in 124 min for two 12 V, 4.5 Ah lead-acid batteries.

A field-programmable gate array-based reconfigurable parallel computing unit to calculate the Walsh–Hadamard transform is proposed. The architecture can process long-duration signals with a large number of samples. Obtained results demonstrate its versatility and usefulness in applications requiring online digital signal processing, utilising few resources in low-cost devises as Cyclone II 2C20 and Cyclone IV EP4CE22.

This Letter presents an efficient inference processor for binary convolutional neural networks in an FPGA that has tight limitation of the available hardware resources. The proposed processor, named inference processor in a tiny FPGA (IOTA), incorporates the dual block-processing cores, which process each constituent block of a network cooperatively skipping redundant operations. Implemented in Intel®MAX®10, IOTA achieves the energy efficiency of 1.7 TOP/J with the resource usage of just 4.7 K lookup table (LUT) and 384Kbit BRAMs, where a single binary operation has been counted by 1 OP. A fully-integrated inference system has been developed to demonstrate the functionality of IOTA. It can infer the classes of 172.85 images per joule for the CIFAR-10 classification task.

This Letter reports a new no-equilibrium chaotic system with hidden attractors and coexisting attractors. Bifurcation diagram shows that the proposed system generates chaos through period-doubling bifurcation with the variation of system parameters, and the hidden chaotic and periodic attractors are visually given by phase portraits. The coexisting chaotic and periodic attractors from different initial conditions are observed in the system. The analogue circuit realisation and microcontroller-based experimental implementation of the system are given to verify its physical existence.

A two-way oxide rupture scheme in a transistor is proposed for area-efficient PUF implementation for low-cost IoT systems. Compared to a conventional one-way oxide rupture scheme, which requires a 4T unit cell structure, the proposed scheme allows a 2T unit cell structure, which enables up to 70% area reduction. A test chip is fabricated in 180 nm CMOS process to evaluate the effectiveness of the proposed scheme, confirming good randomness and uniqueness with small area overhead.

This Letter proposes a novel technique for automatic position offset calibration for permanent-magnet synchronous machine (PMSM) drives. Contrary to existing methods, the proposed technique estimates and compensates for the position offset without using machine true parameters or signal injection, which is possible under the condition of zero-current control at high enough speed where parameter-dependent terms are eliminated. To achieve this condition using uncertain parameters, speed control with absolute value feedback and model-free current control are devised. Additionally, under this condition, not only the misalignment of the position sensor but also the sensor delay can be considered as the position offset, which improves the accuracy of the calibration. The proposed approach will be verified by experimental results.

This Letter presents a simple and new colour correction algorithm for the underwater image. The proposed method corrects the pixels of the weak colour channel based on the ratio of the standard deviation of the weak colour channel to that of the green channel. The corrected image based on the proposed colour balanced algorithm barely produces a reddish artefact and can be applied directly to the existing dehazing approaches without any processing. The experimental results show that the proposed algorithm achieves good colour correction performance, as well as reasonable underwater image enhancement when employed with the existing dehazing methods.

Obtaining high-resolution images is one of the critical issues in many areas. The super-resolution (SR) algorithm is a method of obtaining a high-resolution image from low-resolution images. The projection onto the convex sets (POCS) iteration method is an essential spatial multi-image SR algorithm. In addition to generating Gibbs artefacts, the traditional POCS algorithm has some restrictions on the image source, such as the signal-to-noise ratio and the resolution of the reference frame. In order to remove the limitation of image source, eliminate artefact, and get more edge information from iteration. This Letter proposes a new POCS iterative model. This Letter uses the high-frequency (HF) image obtained after a non-downsampling contourlet transform as the iteration object. It uses the unique attributes of the HF image to establish a new constrained convex set to construct the iterative formula. In order to make the iteration effect more apparent, this Letter has Laplace enhancement to the reference frame selected by principal component analysis. The experimental results show that the results obtained by the proposed algorithm are satisfactory in both subjective and objective evaluations.

Object tracking based on unmanned aerial vehicles (UAVs) has attracted extensive research attention recently since it provides the ability to continuously observing and tracking the target owing to its inherent advantage. However, occlusion is a crucial interference which may cause performance degradation in long-term UAV-based tracking. In this Letter, the authors propose a robust and efficient long-term tracker based upon local feature matching and density clustering. To be more specific, the authors propose a keypoint-matching based confidence indicator to monitor the tracking condition and activate the re-detection module when occlusion is predicted. Once occlusion occurs, a novel density-based clustering method is utilised to re-locate the target with the collected local features. Extensive experiments have demonstrated that the proposed algorithm performs favourably against the other related trackers.

This Letter investigates the impacts of hardware impairments (HIs) and channel estimation errors (CEEs) on the secrecy performance of satellite communication networks with one legitimate user and one eavesdropper. Particularly, the authors derive the closed-form expression for the secrecy outage probability (SOP) of the considered secrecy satellite communication networks. Besides, in order to research the impact of the HIs and CEEs at high signal-to-noise ratios, they obtain the asymptotic expression for the SOP, which gives efficient and fast method to evaluate the effect of the considered system parameters on the secrecy system performance. At last, Monte Carlo computer results are given to verify the effects of HIs and CEEs on the secrecy system performance.

Cloud clients face high security risks while sharing physical resources with multiple users. A malicious cloud user exploits co-residency and hypervisor vulnerabilities to steal and hamper sensitive information of victim virtual machine (VM). To address this alarming issue, this Letter proposes a secure resource allocation model by developing a threat detector based on the analysis of co-located inter-VM relations and a workload predictor in the background. The anomalous network traffic, response speed, bandwidth usage and illegal inter-VM links are considered as security breaches indicator that assists in future threat detection beforehand and consequently guides the secure and resource efficient VM allocation. The comparison of proposed model with state-of-the-art: FCFS, Random-fit and NSGA-II based resource allocation approaches indicate that it significantly reduce security threats by 77.38% and number of active servers up to 5.39% with improved resource utilisation up to 26.84% over Random-fit.

The authors developed a wideband on-chip Wilkinson power divider (WPD) using lumped-element transmission lines (LE TLs) with 2-port negative capacitance (NCAP) circuits that provide the phase response with a positive slope and broadband port impedance. The bandwidth of the WPD was increased using the broadband quarter-wavelength (λ/4) LE TLs with port-matched NCAP circuits. The WPD was implemented in the Global Foundry 8SF 130-nm RF CMOS IC technology. The size of the core chip is 1100 µm × 400 µm. The S-parameter measurements showed an absolute bandwidth ranging between 0.76 and 1.6 GHz, and a fractional bandwidth of 71.2%. In the frequency range of the bandwidth, the insertion loss was 0.4–3.4 dB, with the isolation between the two output ports was >18 dB, and the noise figures were 11–12 dB. The input-referred 1-dB gain compression point at the frequency of 1 GHz was ‒6 dBm.

A compact triple-band high-temperature superconducting (HTS) filter with high selectivity based on self-coupled stepped impedance resonator is proposed in this Letter. By folding the two-opened arms of the λ/2 stepped impedance resonator, inter-resonator coupling has been evolved. Due to theoretical analysis of the resonator, the first three resonant frequencies are used to construct three passbands with controllable frequency ratios and bandwidths by changing coupling coefficient, impedance ratios and length ratio. Finally, a triple-band filter example with frequencies centred at 1.72/4.05/7.6 GHz (frequency ratios of 1:2.4:4.4) is designed, fabricated and tested, which has multiple transmission zeros and compact size. Good agreement between the simulated and the measured results validates the design method.

This Letter demonstrates thermoelectric rectification in graphene self-switching diode (GSSD) on SiO₂/Si substrate. Nanometre-scale non-linear semiconductor device, called self-switching diode (SSD), has been utilised. Applied bias leads to a change in potential profile and effective channel width of GSSD resulting in diode like I–V characteristics. The excellent electronic properties of graphene potentially make it suitable for producing SSD's with high responsivity and low noise equivalent power (NEP). The designed GSSD demonstrates a high Seebeck coefficient (S) of 200 μV/K, voltage detection sensitivity, and NEP of 97.964 V/W and 0.6064 nW/Hz^1/2, respectively. Furthermore, the effect of applying backgate voltage on the Seebeck coefficient has also been demonstrated in this work. The GSSD is presented as a potential thermoelectric rectifier, which can convert the thermal energy into useful electrical energy.

An eight-channel hybrid-integrated light source with 100 GHz channel spacing fabricated by a passive alignment technology is demonstrated. Side mode suppression ratios of better than 40 dB were obtained via grating couplers under eight-channel simultaneous operation at a continuous wave current of 600 mA and 25°C. The surface slotted laser array fabricated by standard lithography butt-joint with silicon photonic devices was demonstrated for the first time, to the best of the authors’ knowledge.

In this Letter, the authors propose using compressive sensing (CS)-based Stolt migration imaging approach to reduce the amount of measurement data and provide an enhanced imaging quality. The authors utilise both forward and backward Stolt migration imaging operators to deal with the measurement and image the space data in two-dimensional matrix form for sparse recovery computation. This imaging process accounts for the electromagnetic wave propagation and does not require prior knowledge of the transmitted pulse, which is practically not available in practice. Results of the proposed numerical simulation demonstrate the validity and effectiveness of the proposed imaging algorithm.

In this Letter, the authors propose a face identification method using radar sensor data. They use a frequency-modulated continuous wave radar sensor that utilises a centre frequency of 61 GHz and a bandwidth of 6 GHz. Then, they accumulate radar data by transmitting and receiving radar signals on human faces. Finally, they use a convolutional neural network (CNN) to distinguish radar signals reflected from different human faces. In this network, signals received from multiple antenna elements are synthesised in parallel to make the radar signals into an image that is the input form of the CNN. The accuracy of face recognition through the CNN is . In addition, they also collect radar data when the same subjects wear cotton masks. Within their entire dataset, wearing a mask does not significantly affect the accuracy of the radar-based face recognition method.

A cross-eye jammer based on a phase-conjugating (PC) retrodirective array is proposed. Such PC cross-eye jammers eliminate the delay inherent in traditional Van-Atta (VA) cross-eye jammers and induce errors in radars that use the same antenna beam for transmission and reception, while VA cross-eye jammers do not. Validated simulations are provided to confirm the effectiveness and retrodirective properties of the PC cross-eye jammer.

A buried gate fin p-body insulated gate bipolar transistor (BG-Fin-P IGBT) is proposed to achieve ultralow on-state voltage drop (V _CE(sat)) and good short-circuit (SC) ruggedness simultaneously. A buried gate is introduced at the bottom part of the fin structure, forming a local region with the nanoscale mesa width, which enhances the conductivity modulation effectively. Meanwhile, a relatively wide mesa width (>0.5 μm) can be adopted at the main fin structure to maintain a good SC capability. Compared to the previously reported ultra-narrow-mesas fin p-body IGBT, simulation results reveal that the V _CE(sat) of the BG-Fin-P IGBT is reduced from 1.39 to 1.03 V at the current density of 100 A/cm² without SC ability degradation. Meanwhile, more than 10 μs short circuit withstand time is enabled at the junction temperature of 423 K for all structures. Moreover, the proposed structure can avoid a fabrication difficulty of the emitter contact when a very narrow mesa width (∼30 nm) is required to achieve the ultralow V _CE(sat), which brings design freedom on the device's structure.

In this work, the authors developed vertical gallium nitride metal-insulator-semiconductor field-effect transistors (GaN MISFETs) for direct chip-on-chip assembly with gallium arsenide-based broad area distributed Bragg reflector diode laser. The intention of this work had been to provide a high-speed driver solution having extremely small parasitic inductive loops. It is shown that devices manufactured on ammonothermal substrates have large conduction current density above 1.7 kA/cm², specific on-state resistance as low as 2.1 mΩ·cm² and on-state sheet resistance of 18.6 Ω·mm. It is further shown that scaling these devices to large gate periphery chips is possible. Finally, a low inductance vertical GaN MISFET on laser diode integration assembly is realised on an AlN ceramic board using a transistor chip with 142 mm gate width and 305 mΩ on-state resistance. The arrangement enables 3.6 ns laser pulses at an emission wavelength at 904 nm and a peak optical power of 4 W.

Optimal rotation of an unmanned aerial vehicle (UAV) mounted with a cross array for enhanced two-dimensional (2D) direction estimation is discussed, and a novel method based on Cramer–Rao bound (CRB) minimisation is proposed. CRB serves as the lower bound for direction-of-arrival (DOA) estimation, which directly determines the localisation performance of jamming sources. Based on the fact that CRB differs while UAV's rotation angle changes, a theoretical closed-form solution for an optimal rotation in the 2D direction estimation is derived, and then the authors can acquire capability enhancement of DOA estimation after the optimal rotation. Rigorous analysis and multiple simulations demonstrate the feasibility and effectiveness of the proposed scheme.

The general objective of this research is non-destructive assessment of the grain size in the metals. The authors suggest a new way of applying neural network technology when the neural network is used for analysis of the ultrasonic structural noise. It was assumed that the signals of ultrasonic structural noise are measured at several frequencies. In order to address structural noise issues, a convolutional neural network is designed to process ultrasonic sensor data, to learn structural noise features and to achieve direct grain size estimation simultaneously. To ensure minimum data gathering of metal samples, the design focuses on neural network with concept of semantic instance segmentation, for data extrapolation. Experimental results show that proposed methods as semantic instance segmentation with combined convolutional and fully connected dense neural networks with classifiers outperform the other single neural networks with original samples with high signal to noise ratio (SN) data.

In the fifth-generation mobile communications networks, several resource allocation techniques have been used, such as static allocation and dynamic algorithms (greedy or matching theory); this work proposes a new subcarrier allocation scheme based on the evaluation of the instantaneous behaviour of the wireless channel using the condition number of the channel matrix . Simulation results reveal that the proposed scheme increases the total sum rate of the system, compared to their predecessors.