A compact all-metallic cavity-cascaded antenna is presented. A two-end-shorted metallic plate is shorted and divided averagely by five identical shorting walls alternatively, forming five alternatively cascaded open cavities. By selecting proper width of the metallic plate and length of the shorting walls, all the five open cavities operate in the TM_1n0 (n = 0.5) mode, generating five fringing fields with the same phase. Thus, effective radiation is achieved. The proposed antenna is operated in the 5-order mode, e.g. five standing waves are distributed along the proposed antenna. It only occupies a volume of 0.43λ ₀ × 2.83λ ₀ (λ ₀ is the wavelength of the centre frequency). Moreover, the proposed antenna is fabricated by all metal, resulting in low cost, light weight, wide bandwidth, high gain and high efficiency. A prototype that can provide an overlapped impedance bandwidth and 3 dB gain bandwidth of 7.72% from 8.10 to 8.75 GHz and a peak gain of 13.37 dBi at 8.5 GHz is built and measured.

A new broadband circularly polarised printed antenna is proposed. This antenna is evolved from a bow-tie dipole antenna, which have wideband impendence bandwidth (IBW). It uses a configuration of rotational symmetry dipole structure to be radiators. This rotational symmetry structure makes the surface currents to produce a circular polarisation wave. The simulation and measurement results are very consistent. The results show good performance of IBW is ∼140.6% (1.91–10.95 GHz) for S ₁₁<−10 dB, 3 dB axial-ratio bandwidth is ∼96.6% (3.70–10.62 GHz).

A new printed MIMO system with eight elements for a 5G mobile terminal is investigated. The MIMO system consists of printed planar inverted-F antenna elements operating at GSM1900 (1880–1920 MHz), LTE2300 (2300–2400 MHz) and LTE2500 (2540–2620 MHz). The antenna elements have a compact size of 14 mm × 15 mm and are deployed on the non-metalised part of a PCB with dimensions 136 mm × 68.8 mm × 1 mm. By only utilising radiation pattern diversity, good isolations and envelope correlation coefficients for both MIMO systems are achieved. The mean effective gains of the antenna elements are also presented.

A frequency selective surface with absorptive/ transmissive property is represented. It allows waves at high frequency around 10 GHz to transmit with very low insertion loss by using the resonance between a parallel microstrip LC structure. It also possesses a wide absorption over lower band by inserting lumped resistors into elements. The absorption band is over 3–9 GHz. A prototype is fabricated and its absorptive/ transmissive performance is measured.

A compact, dual-polarised multiple-input and multiple-output antenna for small-cell base stations is proposed. This antenna is operating at long-term evolution (LTE) band-5 and consists of two stacking substrates and cavity-backed structures. To produce dual polarisation, two edges of the feeding patch on the lower substrate are individually fed by unbalanced power dividers with a phase difference of 90°. These unbalanced power dividers improve the isolation characteristic of this antenna. Measured results show that the proposed antenna has a port isolation higher than 30 dB over the operating range of 820–900 MHz. Furthermore, a high front-to-back ratio of 13.5 dB is obtained in spite of the compact size because there are no slots on the ground plane.

A multiple-input–multiple-output dual-antenna system covering the long term evolution (LTE700), LTE2500 and LTE3.5 GHz communication standards is proposed for user terminal applications. High isolation and good envelope correlation coefficient performances can be obtained in both bands. Gain, efficiency and radiation characteristics are also shown.

A miniaturised multiband directional dipole antenna for mobile communication applications is proposed. The proposed antenna consists of electromagnetically coupled two-dipoles with a folded reflector and inverted L-shape stubs on the edge of the folded reflector. The stubs are used to obtain a reduction of the antenna size. The occupied volume of the proposed antenna is 0.34 λ ₀ × 0.29 λ ₀ × 0.10 λ ₀. (λ ₀ is the wavelength at 900 MHz) To provide multiband characteristics, the radiator designed electromagnetically coupled two-dipoles with dual resonance frequencies. The performance of the proposed structure successfully covers the frequency bands of 700–1000 MHz and 1700–2700 MHz.

A low-profile dual-band half-mode substrate-integrated cavity antenna with a fully shielded textile feeding mechanism is presented for wearable applications. The antenna operates at the lower and upper microwave industrial, scientific and medical bands. The cavity geometry is accurately defined with conducting thread through computerised embroidery. Design guidelines are developed for a practical realisation. Good agreement between simulated and measured results validates the proposed structure.

Synthetic biology has been traditionally associated with electronics through the application of circuit design concepts towards the genetic engineering of microbes. Due to recent advances in the understanding of extracellular electron transfer in the bacterium Shewanella oneidensis (Shewanella), synthetic biology advances now have the potential of being used towards electronics applications. Towards this end, there is a need for tools that enable the systematic optimisation of genetic circuits in Shewanella. With the introduction of an RK2 origin of transfer cassette, we show that a modular plasmid system constructed prior for synthetic biology efforts in the bacterium Escherichia coli (E. coli) can be ported to Shewanella. In the process, it is also shown that different replication origins can be maintained in Shewanella and that multiple-plasmid strains can be realised in the bacterium. The results suggest that parts accumulated from E. coli synthetic biology efforts over the past decade and a half may be able to be ported to Shewanella, enabling the future engineering of systems where microbes interface with electronics (e.g. biosensors).

In a high-speed digital X-ray imager, each pixel in the matrix needs an analogue-to-digital converter (ADC) in order to assess the energy of the randomly incoming photons. The analogue-to-digital (AD) conversion rate is thus highly dependent on the photon flux parameters, i.e. its mean and its standard deviation. In classic designs, this rate is often set to ten times the maximum photon flux mean, which requires high-speed ADCs. The use of a queue to derandomise the photon flux prior to the AD conversion and so allow the ADC sampling frequency to be decreased to the maximum photon flux mean value instead of ten times that value is proposed. An electronic circuit has been designed and the simulations results show a behaviour close to the theoretical model: at the cost of an additional queue block, reduced speed can be achieved, leading to a lower consumption and an easier integration.

A novel 9-bit time–digital-converter (TDC)-assisted analogue–digital-converter (ADC) supporting energy-efficient high-speed compressive-sensing (CS) operation is presented. With a voltage–time-converter serving as the cross-domain residue conveyer, the proposed two-stage self-timed pipeline ADC architecture hybrids a voltage-domain comparator-interleaved successive-approximation (SAR) ADC front-end and a time-domain locally readjusted folding two-dimensional Vernier TDC back-end. Implemented in 65 nm CMOS technology, the prototype benefits from both the CS-enabled sub-Nyquist operation and the hybrid quantisation scheme, leading up to 4 GS/s equivalent speed with 34.2 dB signal-noise-distortion-ratio (SNDR) and a figure-of-merit (FOM) of 101 fJ/conversion step.

Despite their alias-free operation, continuous time ADCs can have their power consumption overwhelmed when presented out-of-band, high frequency, high amplitude signals. A new continuous time ADC architecture which, thanks to its embedded low-pass filter transfer function is proposed, enables a power efficient quantisation in the presence of such signals. Moreover, the half-digital nature of this approach simplifies the implementation of the proposed system compared to a standard filter-first solution.

Data retention characteristics are investigated in charge trapping flash memory. The physical root cause of the non-Arrhenius behaviour, which is the general retention characteristic in charge trap flash memories, is numerical modelling that the charge loss mechanism is associated with the trap energy level in the charge storage area. For expression of the charge loss in the relatively shallow traps, multiphonon emission model is adopted. Finally, the ratio of the relatively shallow traps to middle and deep level traps is extracted in a sample data.

A digital predistortion (DPD) architecture is proposed with the dynamic range of the feedback channel being reduced. In this architecture, an extra radio frequency (RF) chain is deployed to cancel the linear components of the power amplifier (PA) output signal to reduce the dynamic range requirement on the analogue-to-digital converter (ADC) of the feedback channel. Subsequently in digital domain, the original PA output signal is estimated from both the digital replica of the RF cancelling signal and the acquired residual signal after cancellation, which is utilised to extract the DPD coefficients. Experimental results validate the effectiveness and superior performances of the proposed architecture, particularly with the number of ADC bits being reduced.

A proposal of current source based on a linear-assisted DC/DC converter is presented, in which a linear voltage regulator assists a switching DC/DC converter in order to obtain a compact circuit with advantages of both alternatives; i.e. high efficiency (similar to the switching converter), and low output ripple and fast reaction to the load changes (similar to the linear regulator). To reduce the power dissipation in the linear regulator, it is considered as an assisted circuit for providing just a little fraction of the load current. Furthermore, this stage provides the required clock signal for the switching counterpart, resulting in reduction of the complexity in the design of the control scheme for the switching converter and a compact topology, especially for on-chip practical implementations, since no output capacitors are required. This last advantage provides the possibility of obtaining good-performance current-source drivers for LED technology in lighting applications. The implementation and results indicate that the proposed linear-assisted DC/DC regulator-based current source can achieve a notably compacting and higher performance, while consuming less power in comparison to linear alternatives.

A novel robust watermarking methodology for intellectual property core protection of control data flow graphs during behavioural synthesis based on user specified resource constraints and loop unrolling factor is proposed. The proposed methodology incorporates robust multi-variable signature encoding scheme for securing against typical attacks such as false claim of ownership and tampering. Some of the features of the watermarking include greater robustness, lower embedding cost, lower storage overhead, fault tolerance and faster encoding/decoding. Experimental results suggest that the watermarked solution generated by the proposed approach produces lower embedding cost than previous approaches, as well as is more secured due to its multi-variable signature encoding rules.

Background subtraction is an important part of various computer vision applications that can detect the foreground objects by comparing the current pixels with a background model. The general approaches gradually update the background model according to the current status, but might fail in sudden illumination changes. An illumination-robust background modelling method is proposed to address this problem. The method provides quick illumination compensation using two background models with different adaption rates. Experimental results show that the proposed algorithm outperforms several state-of-art approaches and provides low computational cost.

Histogram equalisation (HE) methods using the 2D histogram (2DH) have achieved a great success in contrast enhancement. The 2DH is constructed by using the occurrence of a local pixel pair (LPP) consisting of each pixel and its surrounding pixels. However, the 2DH-based methods often produce over-stretching artefacts because the low-textured regions primarily existing in the image induce a spike at some LPPs in the 2DH. To solve this problem, the 2DH is constructed by employing two properties of the human visual system (HVS) as follows: the HVS has the better brightness discrimination in the dark region according to Weber's law, and the HVS is less sensitive to visual artefacts in the higher-textured regions. To create a spike-free 2DH, a weighting function reflecting these two properties of the HVS is designed for the LPP. As compared with the popular 2DH-based methods, the HE with the proposed 2DH can effectively enhance the image contrast while achieving the best perceptual similarity score between the input and output images.

In this Letter, a new algorithm to reduce false positive in video surveillance by integrating depth using laser range finder with conventional camera is proposed. Typical video surveillance detects foreground objects by background model using only image. Background model is updated using brightness value on image so that it has difficulty in modelling diverse variations caused by illumination changes or scene structure variations. Inherently, there could be many false positives. Hypothesis generation and verification paradigm is adopted by integrating laser range finder with camera on video surveillance. Conventional background updating algorithm is used for generating foreground objects. They are verified by depth value provided by laser range finder. Rotating 2D laser range finder for targeting and generation of look-up table is used. Experimental results show that proposed algorithm can reduce false positives in video surveillance.

Recently, the binary matrix with binary correlations between columns has attracted attention for its sparse structure and competitive performance. However, such kind of matrix tends to suffer an increasing coherence, i.e. the maximum absolute correlation between columns, as the compression ratio decreases. It is shown here that the binary matrix mentioned above allows to be duplicated in columns, while not degrading the coherence, if bipolar signs are introduced. The resulting ternary matrix is thus expected to present smaller coherence than the aforementioned binary matrix of same size.

A novel robust algorithm for the interference-plus-noise covariance matrix (IPNCM) reconstruction according to its definition is addressed. Unlike the previous works, each interference steering vector (SV) is estimated as the prime eigenvector of the interference covariance matrix obtained by integrating over each interference angular sector and its power through the Capon spectral estimator is also estimated. Then, a more precise IPNCM based on these accurate estimates is reconstructed. In addition, the same idea is used to estimate the SV of the signal of interest over the signal angular sector. Simulation results demonstrate that the proposed beamforming has much more robustness against the large look direction errors of the interferences, and can attain the optimal beamformer in both high and low signal-to-noise ratio cases with low computational complexity.

Modelling enemy networks in a way that reveals their key entities and links is important when disrupting complex networks with high redundancy. How best to attack such networks under a limited ground intelligence constraint is examined. The key modelling contribution is to include both the heterogeneity of the node functions and the dynamics of recuperation after destruction. Through identifying the core nodes, the results show that ground intelligence should focus on locating and attacking high degree nodes, yielding a 41% reduction in conflict length over random opportunistic targeting and a 23% reduction over specialist targeting. Even when difficult to replace specialists are considered, targeting high degree nodes that can recuperate quickly, remains the most effective method of attack. The impact is to allow military forces to more effectively target enemy nodes that will cause functional paralysis and create further collapses.

The symbol pairwise error probability performance of the Alamouti space-time block code (STBC-Alamouti) and the STBC from the coordinate interleaved orthogonal design (STBC-CIOD) over Nakagami-m fading channels is investigated, especially with residual phase estimation error (PEE). The derived union upper bounds on the average BER are utilised to evaluate the effect of the residual PEE on error performance. Rigorous numerical results demonstrate that both STBCs can asymptotically achieve full-diversity even with the adverse effect of PEE in the high SNR regime.

The effect of packet losses over error-prone networks on visual quality of distributed video contents, estimated through subjective opinion and PSNR as an objective measure is analysed. It is shown that, within a fixed content, the variation of PSNR is a reliable indicator of the variation of packet loss rates. However, across different contents, the performance of PSNR is highly reduced. This performance drop can be corrected using the right pooling strategy.

A novel capacitance-to-digital converter (CDC) that performs an accurate measurement of the capacitance of a leaky capacitive sensor is presented. The conversion technique of this CDC is novel, which helps to achieve the highest interference rejection compared with the exiting CDC topologies. The digital output from the CDC is directly proportional to the sensor capacitance, C_x . It provides an accurate output even in the presence of a parasitic leakage resistance, R _p, parallel to the sensor. A prototype CDC has been developed and tested. Worst-case error was found to be 0.1%. The CDC employs a sinusoidal excitation for the sensor, and is suitable for a variety of applications such as proximity or touch detection, detection of ice, level sensing, humidity measurement, etc. This CDC is well suited for applications where the conventional schemes fail to work due to the extreme interference from other sources, e.g. power line.

A new temperature sensor utilising an adaptive nonlinearity cancellation circuit is proposed among two base-emitter voltages (V _BEPT and V _BEIO) of the diode-connected bipolar junction transistors driven in saturation region with a proportional to absolute temperature current and an independent of absolute temperature current, respectively. In this way, the nonlinear effect originated from the temperature dependence of saturation current (I _S) drift can be cancelled adaptively through subtraction circuits. The measurements indicate that the proposed temperature sensor can achieve a sensitivity of −9.75 mV/°C with linearity up to 99.95% over the temperature range of 170°C (−40–130°C).

Design approach of wideband envelope termination (ET) for high efficiency RF power amplifiers (PAs) is discussed, considering power loss subject to design constraints including envelope bandwidth, inductor quality factor, and transistor output impedance. Analysis shows that the optimum ET topology depends on the design constraints. For LTE-advanced transmission with 80 MHz channel bandwidth, a novel wideband ET is designed using an AC-terminated third-order LC filter (LCF-ET), providing 3 dB envelope impedance bandwidth of 150 MHz. Measured results demonstrate 1.75 dB envelope power loss and −39.2 dB normalised root-mean-square error with the LTE envelope signals. For the LTE signal with 10.3 dB peak-to-average power ratio, the average power efficiency of an ideal Class-A RF PA with the LCF-ET prototype is calculated as 33.4% from the measured 1.75 dB envelope power loss, which exceeds 4.7% and 24.0% average power efficiency of conventional Class-A and Class-B PAs without ET.

A new low-power current-reuse quadrature voltage-controlled oscillator (QVCO) is proposed. The proposed QVCO couples two complementary current-reuse Armstrong voltage-controlled oscillators (VCOs) using series coupling switches. The current-reuse technique reduces the power consumption, and the transformer-based Armstrong configuration improves the phase noise performance by increasing the negative G_m of the VCO core. The proposed QVCO consumes 2.46 mW of power at 8.71 GHz from a 1.1 V supply. The measured phase noise is −113.3 dBc/Hz at the offset frequency of 1 MHz, and the figure of merit is −188.2 dBc/Hz. The frequency tuning range is from 8.34 to 9.13 GHz. The chip area is 700 × 340 μm² in a 0.13 μm CMOS process.

Quantum-dot cellular automata (QCA) is an emerging field-coupled nanotechnology that promises to outperform existing CMOS technology. Single-layer QCA designs of full adder, full subtractor, ripple carry adder, and ripple borrow subtractor is proposed. The proposed designs are improved over both existing single-layer designs and multilayer designs.

The implications of simultaneous differential power analysis (DPA) and leakage power analysis (LPA) attacks are investigated on nanoscale cryptographic circuits which employ dynamic voltage scaling (DVS) or aggressive voltage scaling techniques. As compared with individually performing a DPA or an LPA attack on the corresponding cryptographic circuits, the number of required plaintexts to disclose the key with a 0.9 success rate reduces by 93.5% (as compared with DPA attacks) and 93.06% (as compared with LPA attacks), respectively, when the variance of supply voltage is 0.0833 V ².

A capacitive-type MEMS acoustic sensor with a planarised TiN/plasma-enhanced chemical vapour deposition -Si₃N₄/TiN diaphragm based on a polyimide sacrificial layer is presented. The multi-layer diaphragm has the effective residual stress of +31.5 MPa. Furthermore, this sensor features a 21% lower parasitic capacitance and a 56% lower air-gap resistance in comparison with those of a sensor fabricated without planarisation. Five photomasks were used. In addition, to evaluate the frequency response, both an effective capacitance model and an equivalent circuit model equipped with a voltage-controlled voltage source are newly proposed and compared with conventional models. The open-circuit sensitivity is modelled to −45.4 dBV/Pa at 1 kHz with 9.6 V, indicating a difference of 0.9 dB in comparison with the open-circuit sensitivity of the conventional model.

To improve the efficiency of full-bridge converter operating under wide input voltage conditions, this Letter proposes a dual mode modulation method. The full-bridge converter is controlled by phase-shifted mode at low input voltage and asymmetric pulse width modulation mode at high input voltage. The proposed method can reduce power loss, voltage stress of rectifier and output filter requirement. A 500-W full bridge converter with a 160 to 400 V input voltage range is built to confirm the validity of the proposed dual mode method.

The first LiNbO₃ thin film attenuated counter propagation (ACP) phase modulator is presented. The modulator demonstrates a V_π of 2.5 V and a record 3 dB ACP modulator bandwidth of ∼1.8 GHz. It also demonstrated a lumped element response that is free of propagation delay. This device should be able to be integrated with external photodetectors to form a wideband ACP-optical phase lock loop.

A novel feature selection method based on geometric distance is proposed. It utilises both the average distance between classes along with the evenness of these distances to evaluate feature subsets. The feature evaluation and selection process used therein is very easy to understand, because it lends itself to a simple geometrical analysis. Moreover, because the method does not calculate the relevance or redundancy between features, it is faster than other filter methods that use information or statistical dependency concepts. The experiments demonstrate its markedly better classification performance as well as fast computation compared with existing methods.

High-resolution range profile is the significant characteristic of radar targets in automatic target recognition. Traditional feature extractions of range profiles in target classification are constrained to the original scale. This Letter proposes a multi-scale target classification method based on the scale-space theory. Target range profile feature is extended from single scale to multiple scales. The minimum Kullback–Leibler mean divergence (MKMD) algorithm is developed to achieve the automatic optimal scale factor selection. Classification evaluations on aircraft models using support vector machine and 3-nearest neighbour classifiers demonstrate that the application of scale-space theory in multi-scale feature extraction could effectively enhance the classification performance. The feasibility of the proposed MKMD algorithm is also validated by an enumeration method.

Operation of the 1-transistor, 1-capacitor dynamic random access memory cell that allows for two-bit operation, double the typical storage capacity, is explored. By using a metal-ferroelectric-semiconductor field-effect transistor, a second bit is captured in the ferroelectric layer polarisation resulting from negative and positive polarisation states. As a result, new modes of operation are created giving non-volatile, long-term storage as well as decreased power consumption and radiation hardening. A typical write and read operating cycle is outlined in-depth and used to verify operation indicating four distinct states representing the two bits. The resulting empirical data gives a comprehensive presentation of the read cycle of the memory cell. Methods for determining the polarisation state of the transistor are also explored and used to determine the average value for measured channel resistance using three types of transistors, each having different channel width and length.

A resonant tunnelling diode terahertz voltage-controlled oscillator integrated with a varactor diode (RTD VCO) for a wide tuning range was proposed and fabricated. In single RTD VCO, a tuning range of 120 GHz of the centre frequency of 640 GHz was achieved by a good combination of the RTD and varactor capacitances. A multi-element array of RTD VCOs was fabricated to increase the tuning range. A very wide frequency tuning of 320 GHz (580–900 GHz) was achieved with a four-element RTD VCO array.

Single-layer spiral capacitor utilising fractal geometry is investigated. This capacitor makes use of both lateral and vertical fluxes to improve the capacitance density. Both PCB and on-chip capacitors are designed and simulated using high-frequency structural simulator. The structures are fabricated on PCB using PCB fabrication techniques. The measurement of PCB prototype is carried out by vector network analyser. The result shows the inclusion of fractal concept to spiral capacitor increases capacitance by 10.3%, quality factor by 52.4% and 20% improvement in self-resonant frequency over conventional spiral capacitor.

The feasible power region for co-channel uplink and downlink users without channel state information is investigated in full-duplex (FD) communications. A closed-form expression for minimising the overall transmit power is derived in the high signal-to-noise case. It has been shown that FD has a better power efficiency than the traditional half-duplex communication when the residual self-interference is weak or the users are located near the base station.