A dual-port planar MIMO antenna designed for 2.4 GHz WLAN applications is presented. It consist of two X-shaped arms etched on a square-shaped substrate, which forms a self-decoupled structure that can generate two orthogonal modes with ultra-high isolation. In measurement, the −10 dB bandwidth covers from 2.39 to 2.51 GHz, and better than 43 dB isolation is achieved between the two ports. Meanwhile, the patterns are orthogonal, and the envelope correlation coefficient is only 0.0052. The antenna it is fabricated on FR-4 substrate, and the size is only 33 × 33 × 3.2 mm, which is very much suited to space-limited MIMO applications that require ultra-high isolation, good pattern diversity and low fabrication cost.

An efficient bi-iterative source location and velocity estimation method with time difference of arrival (TDOA) and frequency difference of arrival (FDOA) measurements is developed. The bi-iterative method calculates the source location and velocity alternately, which significantly reduces the computational cost. Most importantly, the estimation accuracy of the bi-iterative method is closer to the Cramer-Rao lower bound than that of other localisation methods. Simulation studies show the superior performance of the proposed method over existing localisation methods.

A broad beamwidth stacked patch antenna with wide circularly polarised (CP) bandwidth is presented. The proposed antenna consists of a stacked structure with a rectangular shell under its ground structure to obtain CP characteristics and wide beamwidth. The radiation quality is excellent over the entire upper hemisphere. The 3 dB beamwidth of the proposed antenna on 2.4 GHz is larger than 140°. Moreover, the CP bandwidth, determined from the 3 dB axial ratio, is found to be about 240 MHz. CP bandwidth of 10.2% and the impedance bandwidth of 52.8% centred on 2.4 GHz are obtained. The proposed antenna is a good candidate for wide angle scanning phased arrays.

A multilayer thin film antenna for mobile devices is proposed. The proposed antenna consists of a (indium–zinc–tin oxide) IZTO/Ag/IZTO multilayer film, which is fabricated on a polyimide substrate (ε _r = 3.5) and a copper layer. The centre frequency of the antenna is 1260 MHz. The geometry of the antenna is made up of a coupled loop and two branches. The proposed antenna was fabricated using the DC pulse sputter instrument. The measured and simulated results of the antenna are given. The measured peak gain of the proposed antenna is 1.66 dBi. The transparency of the IZTO/Ag/IZTO thin film on the polyimide substrate is 86%. The advantages of the proposed antenna are high transparency, low resistivity and flexibility.

The use of a backing cavity composed of a frequency selective surface (FSS) above a metal plate as a means to suppress the back lobe radiation and increase the gain of an Archimedean spiral antenna that operates from 3 to 10 GHz is investigated. The FSS is designed to reflect signals in the upper band (7–10 GHz) with a loss of <0.25 dB, and allow transmission in the lower band (3–6 GHz). Good impedance match and bidirectional to unidirectional beam transformation is obtained when the FSS and metal plate are inserted at a distance λ/4 below the spiral at the centre of the upper and lower bands, respectively. Simulated and measured radiation patterns are employed to show the performance enhancement, which is attributed to the FSS reflector.

The instability of vessel plaque is thought to be associated with the size and distribution of the lipid core. Ultrasonic B-mode imaging (ultrasonic amplitude imaging) can visualise plaques, but it is unable to provide information about their composition. Based on the fact that the temperature dependence of ultrasonic velocity differs considerably between water and fat, the motivation for this reported work was that it was thought that ultrasonic velocity-change imaging could help characterise biological tissues. This method should be able to detect unstable plaque because it is lipid-rich. A blood vessel phantom of agar base material having similar ultrasonic properties to human soft tissue was made. A small piece of fat was inserted into the blood vessel phantom. Water (instead of blood) was passed through the model vessel using a tube pump. Ultrasonic velocity-change images were constructed from echo pulse waveforms obtained before and after warming using an ultrasonic transducer. Lipid-rich areas in the blood vessel phantom were obvious in the ultrasonic velocity-change image, but not in ultrasonic B-mode images. These results indicate that ultrasonic velocity-change imaging is able to characterise carotid artery plaque.

A novel high-speed column-line driving scheme having output buffer amplifiers embedded with polarity multiplexer switches is proposed for use in large-sized thin-film transistor liquid-crystal displays. The proposed driving scheme does not have explicit output-polarity switches, resulting in lower settling time. Experimental results in a 1.2 μm 13.5 V CMOS process indicated that using the proposed driving scheme the settling times to reach 99% of target voltages for the dot and column inversions were improved by up to 48.6%. This driving scheme can be applied to class AB- or class B-type amplifiers for liquid-crystal display column drivers and output buffers controlled by output switches.

A novel low-power sense-amplifier-based flip-flop (FF) is presented. Using a simplified single-ended pass transistor-based latch design, the loading of the sense amplifier is greatly alleviated, which facilitates a size reduced sense-amplifier design as well. These factors improve the power consumption and the delay of the FF design substantially and the performance claims are verified through extensive post-layout simulations.

A low-power high-speed source follower-based switched capacitor (SC) amplifier for pipelined analogue-to-digital converters (ADCs) is proposed. Using the source follower as the core of the SC amplifier, the power consumption can be significantly reduced while obtaining the same linearity and bandwidth. Meanwhile, through replicating the input signal to the drain of the input transistor, the channel-length modulation effect can be suppressed, achieving a high linearity (>60 dB). The functionality and linearity of the proposed SC amplifier are verified by simulation results.

A novel approach to use a voltage-controlled oscillator (VCO) as the first integrator of a high-order continuous-time delta–sigma modulator (CT-DSM) is presented. In the proposed architecture, the VCO is combined with a digital up–down counter to implement the first integrator of the CT-DSM. Thus, the first integrator is digital-friendly and hence can maximally benefit from technological scaling.

A novel technique to tune an inductor–capacitor (LC) network based on a receiving signal frequency is proposed. The method consists of using a negative resistor to artificially increase the quality factor of the LC circuit to reduce the decision range of the voltage detector. This approach allows the use of low complexity algorithms that converge in a few steps. The technique was validated through a demonstrator for radiofrequency identification tags in production line testing, with satisfactory results. The designed negative resistor maintained a constant resistance for a large range of input signals.

A novel double-sampling (DS) technique for use in sigma–delta modulators (ΣΔMs) is presented. The proposed technique uses a digital bilinear filter in the feedback path of the modulator loop. The bilinear filter suppresses the quantisation noise folding (QNF) that results from the DS path mismatch. Unlike other solutions for the QNF, the digital implementation of this filter allows the sharing of the input sampling capacitor with the feedback sampling capacitor without any additional analogue gain stages. This way, the power consumption in the input signal buffer can be greatly reduced, because it benefits from the nullator effect at the input of the ΣΔM loop, and hence the current needed to drive the shared sampling capacitor is drastically reduced. Moreover, the proposed DS technique is also suitable for a single-ended circuit implementation of DS.

A novel linear matrix inequality (LMI) condition for the stability of the sampled-data fuzzy control system based on the Takagi-Sugeno fuzzy model is presented. Using the novel Lyapunov functional, the relaxed stability condition is presented for the sampled-data fuzzy control and represented in the LMI format. A simulation example is provided to verify the effectiveness of the proposed technique.

A new commutation point (CP) estimation method for a high-speed sensorless brushless motor using the back-electromagnetic force (EMF) change rate is proposed. Typical CP estimation methods may not work correctly either at high speed when the number of sampled data is not enough or at low speed when the back-EMF voltage is weak. In the proposed method, the back-EMF voltages are measured using an analogue-to-digital converter. The back-EMF voltage change rate is calculated from the measured values and utilised to estimate the CP by employing the least-square method. The experimental results show that the proposed estimation method works correctly over a wide speed-range operation.

A new method, inspired by the gait of horses, for regulating the ground reaction force of a quadruped walking robot, is proposed. The method uses the mechanical stiffness switch with a dual-spring structure inspired by an equine distal forelimb. This includes the use of a low-stiffness spring activated at the moment of touchdown and a high-stiffness spring for the support phase. This method has been applied to Jinpoong, a hydraulic quadruped walking robot, and has contributed to the robot's stable gait on uneven terrain.

Intra mode prediction is extended in high-efficiency video coding (HEVC) for a higher coding efficiency than that specified in the previous video coding standards such as H.264/AVC. Improved coding was achieved mainly due to the increased block partition possibilities and types of modes at the expense of an increased computational complexity. Efficient 4 × 4 intra prediction logic combined with transform logic for HEVC is presented. The proposed design enables 108 frames/s intra prediction for full HD video with reasonable logic size.

Attention is given to the behavioural and cognitive process of selectively concentrating on one object in an image while ignoring the others. Attention-grabbing parts of the visual field are inspected with great keenness. Owing to the limited capacity of the visual system, the retina cannot process everything that falls on it. Instead, the brain relies on attention to bring salient details into focus and filter out background clutter. Salient region detection deals with finding those regions in an image that gain the viewer's attention most. An approach is proposed for salient region detection using the Poisson distribution. The proposed approach does not require any prior training and has been evaluated on the MSRA dataset. The performance is consistent in terms of recall, precision and execution time.

A novel object specified segmentation approach based on the auto-adjusted shape prior by utilising the point set registration method is presented. Three steps are included in the proposed method: (i) initial segmentation, (ii) automatic shape prior adjustment by point set registration and (iii) object segmentation constrained by the adjusted shape prior. To repair the shape difference between the local targets and the given shape model, such as location, scale, rotation and local shape details, an excellent point set registration approach named coherent point drift (CPD) is adopted. The adjusted shape constraints under the coherent moving constraint implied in CPD give reliable boundary predictions. Experimental results on the ETHZ shape dataset have demonstrated the outstanding performance of the proposed method.

A novel approach for image classification, by integrating deep learning and feature interpolation, supported with advanced learning classification techniques, is presented. The recently introduced deep spatiotemporal inference network (DeSTIN) is employed to carry out limited original feature extraction. Newton interpolation is then used to artificially increase the dimensionality of the extracted feature sets for accurate classification, without incurring heavy computational cost. Support vector machines are utilised for image classification. The proposed approach is tested against the popular MNIST dataset of handwritten digits, demonstrating the potential of the approach.

Single-image super-resolution (SISR) is a technology to reconstruct a high-resolution image from a single low-resolution input image. The performance of SISR algorithms is usually evaluated by applying full-reference objective image quality assessment metrics. First, it is argued that the result of objective quality evaluation may become inconsistent with subjective quality assessment, depending on how the input low-resolution image is generated and how up-scaling during SISR is conducted. Since such inconsistency is due to subpixel-level misalignment between the original and output images, a framework is then proposed that compensates any spatial displacement between the two images and enables fair SISR performance evaluation using objective quality metrics.

A new method for object-based place recognition, where objects are used as a key intermediate representation of places, is proposed. Places are represented by object graphs and recognised from similarity scores between the generated graphs. An iterative Hungarian method is proposed for aligning graphs, where node and edge differences are used for measuring the similarity. The proposed technique robustly detects places without false positives, as it considers both the appearance and geometric information of places. Experiments are performed with mobile robots in indoor environments verified the effectiveness of the proposed method.

Efficient pixel-parallel image processing using a pulse-coupled phase oscillator model and its very large scale integration (VLSI) implementation is proposed. A processing unit that corresponds to a pixel of an image transmits spike pulses to other units, and updates its own analogue state value at timing when spikes come from other units. From a VLSI implementation point of view, this mechanism is suitable for very low-power operation because analogue buffers are unnecessary for data transmission. On the basis of this model, a VLSI image processor chip that performs a coupled Markov random field model for image region segmentation is designed and fabricated. A very low-power VLSI design has been achieved by the combination of an analogue oscillator and digital coupling function generator circuits with time-domain computation. The processing performance of the fabricated oscillator-based image processor chip using a 0.25 μm CMOS process has achieved 43.2 GOPS or 656 GOPS/W. Experiments using the fabricated chip have shown successful image region segmentation in one- and two-dimensional images.

In compressive sensing (CS) of images, a block-based framework is preferred to avoid the huge memory and computation required for a frame-based approach. However, the recovered image suffers from blocking artefacts due to independent block processing, especially at a low subrate. As a result of this reported work the artifacts are reduced by weighted averaging adopting two techniques: overlapped CS recovery and adaptive weighting. Simulation results show its improvement in both subjective and objective qualities.

Multiple way tables in which items can be placed on several buckets are used in many computing applications. Some examples are cache memories and multiple hash tables structures. In most cases, the items are stored in electronic memories that are prone to soft errors that can corrupt the stored items. To avoid data corruption, memories can be protected with a parity bit or with an error correction code. It is shown that most single bit errors can be detected in multiple way tables without adding a parity bit. This can be done by placing the items in a predetermined order in the multiple ways of the table.

Data rate fairness issues in a two-way decode-and-forward relay system are investigated. A fairness-aware power allocation (FPA) scheme is studied to maximise the achievable sum data rate under a total power constraint as well as a data rate fairness constraint. It is shown that the data rate fairness can be achieved between the two source nodes with balanced data rates in both multiple access and broadcast phases. Furthermore, simulation results show that the achievable sum rate of the proposed FPA scheme is very close to that of the optimal power allocation scheme without the data rate fairness constraint.

Interference cancellation through interference alignment (IA) at the downlink of cognitive cellular networks is proposed. IA helps the spatial resources to be shared among primary and secondary cells, and thus it can provide higher degrees of freedom (DoFs) through interference cancellation. The achievable DoFs are derived and depicted. The achievable sum rates applying water-filling optimal power allocation are analysed and calculated.

In multiple-input–multiple-output (MIMO) systems, beamforming can maximise the signal-to-noise ratio by using the principal right and left singular vectors of the channel matrix as transmit and receive beam vectors, respectively. A matching pursuit (MP)-based singular vectors estimation (SVE) scheme is proposed, referred to as MP-SVE, for beamforming transmission and detection in large MIMO systems. By judiciously exploiting the specific properties of large MIMO channel matrix, the proposed MP-SVE is able to determine the optimal beamforming vector pair while circumventing the burdensome channel estimation and singular value decomposition. The simulations verify that with the same training overhead, the proposed MP-SVE remarkably outperforms the state-of-the-art counterparts.

Efficient algorithms have been developed over the past 30 years for computing the forward and inverse discrete Hartley transforms (DHTs). These are similar to the fast Fourier transform (FFT) algorithms for computing the discrete Fourier transform (DFT). Most of these methods seek to minimise the complexity of computations and/or the number of operations. A new approach for the computation of the radix-2 fast Hartley transform (FHT) is presented. The proposed algorithm, based on a two-band decomposition of the input data, possesses a very regular structure, avoids the input or out data shuffling, requires slightly less multiplications than the existing approaches, but increases the number of additions.

The architecture for generating a nano-ampere proportional to absolute temperature (PTAT) current source is proposed. The circuit has been designed and fabricated in a standard 180 nm CMOS technology. Measurements were performed on 10 prototypes in the temperature range of −40 to +85°C. The operating supply voltage of the proposed circuit is 850 mV ± 10%. The measured averaged temperature inaccuracy and the linearity of the proposed architecture is between +0.86/− 0.93°C and +0.69/−0.75%, respectively.

A new two-dimensional oscillator array-based injection-locked frequency divider is proposed. Instead of using the conventional analogue tuning technique or the one-dimensional delay chain, a two-dimensional array is implemented to digitally and precisely control the total delay in the oscillator core. This makes it possible to achieve a programmable delay, hence attaining potential programmable division ratios for the injection-locked divider. Fabricated in a standard 0.18 μm CMOS technology, a prototype chip, namely a divide-by-4/5 prescaler using this technique, is able to work up to 6.2 GHz with 0.5 mW power consumption from a 1.8 V supply voltage.

The measurement uncertainties associated with preamplifier gain variation due to temperature change are investigated. It is shown that when temperature decreases from the room temperature (25°C) to 0°C, the uncertainty of the preamplifier gain variation is found to be as large as 1.277 dB. Further investigation of mismatch uncertainty between the preamplifier and the system due to temperature change has been carried out. It is expected that mismatch uncertainty will be greatly affected if the preamplifier input and output voltage standing wave ratio varies at different operating temperatures.

A class AB active inductor with high linearity, including a minimum number of components, is presented. Class AB operation is absent from the literature on the design of active inductors but is addressed in this reported work. Circuit details are given. A prototype board on a TLX8 substrate has been fabricated and tested showing the circuit feasibility for use in many commercial market applications, as integrated circuits, or discrete filters and oscillators.

A novel microstrip lowpass filter (LPF) with a wide stopband is presented. The basic resonator is composed of two stepped impedance hairpin units with one embedded in another, which can obtain two more transmission zeros and extend a wide stopband. Based on the proposed resonator, a demonstration LPF of compact size, sharp transition and wide stopband has been designed, fabricated and measured. The proposed filter exhibits a small size of 0.081λg × 0.113λg, where λg is the waveguide length at the cutoff frequency of 1.6 GHz. Results show good agreement with simulations and the 20 dB rejection stopband can be extended to more than 15 GHz.

A compact lowpass filter using a hexangular shaped resonator is presented. The designed lowpass filter has a −3 dB cutoff frequency of 2.97 GHz. The stopband bandwidth for the attenuation level of −20 dB is from 3.32 GHz up to 21 GHz, and the circuit only occupies 10.04 × 10.92 mm². The structure is simulated, fabricated and measured. Both simulation and measured results are presented and compared and there is good agreement between them. The insertion loss in the passband is <0.06 dB and the fabricated filter presents a sharp transition band from 2.97 to 3.32 GHz for the attenuation level of −3 and −20 dB, respectively.

The influence of electrothermal behaviour on radio frequency (RF) performances of 28 nm bulk complementary metal–oxide semiconductor technology is examined. Biased continuous-wave RF and pulsed RF (applying different DC pulse and RF pulse width combinations) characterisations are performed within the 1–30 GHz frequency domain at room temperature and the transit frequency (f _T) is extracted at 15 GHz frequency. It has been found that the degradation in f _T on I/O devices is about 3 GHz because of the self-heating effect.

The performance of time division multiplexing and frequency division multiplexing protocols for light emitting diode light emitting diode (IPS) designs using visible light emitting diode lights is evaluated. The impact of timing synchronisation errors on the localisation accuracy of IPS designs is also determined.

A low-loss and polarisation-insensitive vertical directional coupler that connects vertically stacked SiO _x waveguides is reported. The fabrication process features the low-temperature formation of an SiO _x film to prevent thermal damage to the lower layer waveguides. Experimental results showed interlayer coupling losses of <0.1 dB in both transverse-electric and transverse-magnetic modes.

The activation time when creating lightpaths is adversely affected by the time optical amplifiers require to adjust the newly added signal power. This shortcoming is particularly true with multi-core erbium-doped amplifiers. A fibre span power management scheme is proposed based on the use of dummy wavelength signals, whose function is to alleviate this shortcoming and shorten the required lightpath activation time. An analytical model is developed to estimate the effectiveness of the proposed scheme in achieving this goal.

A 500 V deep-oxide trench silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) with improved short-circuit capability is proposed. The structure features dual trench gates: one gate (G1) extended to the buried oxide and the other gate (G2) arranged in the deep-oxide trench in the drift region. In the off-state, G2 acts as an emitter-side field plate to shield the lateral electric field from the collector side. In the on-state, negative voltage is applied to G2, leading to a hole inversion layer close to the deep-oxide trench. The hole inversion layer reroutes the hole current and provides an additional heat dissipation path. Experimental results show that the proposed structure exhibits high short-circuit immunity without degradation of the breakdown voltage. The short-circuit withstand time of the proposed structure is 1.55 times that of the conventional one, when the voltage of G2 is −5 V.

A novel latching microelectromechanical system (MEMS) switch is reported, which uses a compact configuration of thermal actuators. In the proposed latching mechanism, the necessary displacement of one of the contacts can be reduced, allowing the use of a linear thermal actuator. This linear actuator together with a V-shaped actuator can be aligned next to each other, requiring less area than the classical latching switch design. Another advantage of the proposed design is the high contact force of 1.33 mN, ensuring a stable contact resistance. The latching switch was fabricated in the Metal multi-user MEMS processes (MUMPs) technology and its functionality was successfully tested. In the latched state, a switch resistance of 0.6 Ω was measured.

The multiple signal classification algorithm has been widely used in array signal processing for direction-of-arrival estimation. In this reported work, this algorithm has been applied, for the first time to our knowledge, to estimate fluorescence lifetimes for fluorescence lifetime imaging microscopy. Monte Carlo simulations were carried out to test its performance compared with the previously reported integral equation method, the centre-of-mass method and the phasor method. Simulation results show that the multiple signal classification algorithm can achieve comparable or better results than the others. More importantly, it can easily resolve multi-exponential decays.

A compact gain-switched nanosecond diode laser pulse source at 920 nm with an output energy of 13 µJ is presented. The developed nanosecond electronic driver is based on GaN transistors and controlled by transistor–transistor logic compatible input pulses. A peak current of more than 430 A for 20–50 ns-long pulses with a repetition rate up to 100 kHz and an electrical efficiency of more than 50% is reached. About 50 ns optical pulses with a peak power of 250 W (13 µJ) are generated with a tapered ridge waveguide bar with 29 emitters. The rise and fall time of the pulses is about 13 ns.

A three-dimensional (3D) terahertz (THz) computed tomography system with a THz quantum cascade laser as the source and a quantum well photodetector as the receiver is demonstrated. By utilising the algebraic reconstruction technique for image reconstruction, both the external and internal structures of the cross-section are revealed. The iterative algorithm not only reduces the projections, but also provides good suppression of the beam hardening effect. Finally, the 3D image is built by stacking the images at different heights.

The temperature effect on a CuInGaSe₂ (CIGS) solar cell was investigated in the temperature range −10 to 80°C using direct current (DC) and alternating current (AC) characteristic analysis of CIGS solar cells. The change rates of short-circuit current density (J _sc), open-circuit voltage (V _oc), fill factor (FF) and efficiency (η) with respect to temperature were investigated. In addition, the variation of impedance, total capacitance and dynamic resistance due to the temperature change implied that the width of the depletion region in a p–n junction shrank, and the effective minority carrier lifetime (τ _eff) decreased. Consequently, J _sc changed slightly due to the balance between the variation of the energy bandgap (E _g) and τ _eff. However, V _oc linearly decreased due to the relationship of E _g when the temperature increased. From these results, it has been concluded that V _oc plays an important role in the characteristics of the CIGS solar cell with change of temperature.

An integrated lossless load current sensing method for buck–boost DC–DC converters is presented. The load current is detected by sensing the average current flowing through the power transistor connected between the inductor and the output capacitor. The circuit is almost independent of voltage and temperature by using a sense resistor method. A second-order on-chip lowpass filter is adopted to average the sensed voltage. The buck–boost converter could automatically switch between heavy and light load modes with a fixed switching current for different input and output voltages.

A decoupling capacitors (decaps) selection algorithm based on maximum anti-resonance points of the power distribution network and the quality factor (Q) of the capacitor is proposed. The experimental results show that the proposed algorithm is superior to the fast algorithm regarding the number of consuming decaps and the genetic algorithm regarding the time consumed.

Microprocessors inject noise into the power distribution network (PDN). The point-of-load (PoL) converters are preferred for microprocessor supplies to reduce the total number of supplies. In addition, PoL helps in reducing voltage drop and power loss, and leverages the PDN impedance requirements by sending power at higher voltage and stepping down at the required location. Switched capacitor converters (SCCs) are replacing inductor-dominated buck converters in PoL applications because of their potential to integrate with microprocessors. A new method to reduce microprocessor-conducted noise by switched supercapacitors built with a 1:1 SCC is proposed. The high-frequency microprocessor noise conducted into the PDN is reduced by the capacitors switching at low frequency. An analogue implementation of the individual switches with low noise coupling through parasitic capacitance and with current limiting is shown. An insertion loss of 40–20 dB in the conducted frequency range (150 kHz–30 MHz) is observed in experiments. The idea can be used as a standalone method or can be incorporated into conventional SCCs with modifications as an additional feature.

A fast-transient capacitor-free low-dropout regulator (LDO) based on a flipped-voltage-follower (FVF) structure has been designed with the proposed digital detecting technique. By increasing the slewing at the gate of the power transistor through detecting the dynamic changes inside the circuit, load-transient recovery time can be decreased by 99.8%. The quiescent current of the proposed LDO is only 3.9 µA under normal operation. In addition, the circuit maintains a small chip area of 0.04 mm² under 0.18 µm CMOS technology since no large RC components are needed to couple the output voltage spikes.

A shunt-regulation control technique is presented to improve the load transient performance of fully integrated high-frequency converters. The undershoot voltage, which used to be limited by the system loop response and the nanofarad range small on-chip capacitor, is significantly suppressed. The proposed converter is simulated by a standard 0.13 μm CMOS process using a 6 nH inductor and 10 nF capacitor under different process corners with parasitics extracted from the layout of critical blocks. Compared to a conventional converter with the bandwidth pushed to the limit, the undershoot voltage is reduced from 360 to 100 mV with a transient step of 150–550 mA in 100 ps.

A robust adaptive beamformer (BF) with low computational complexity is proposed, where the adaptive weight is formulated as a linear combination of the training samples vectors and the target steering vector in the high interferences-to-noise ratio (INR) case. When the number of samples is greater than that of the interferences, an l1-norm constraint is imposed on the combinational vector to force its sparsity. Simulation results indicate that the proposed algorithm outperforms some classical robust BFs.

A new approach for designing a sequence that has very low autocorrelation sidelobe levels at specified intervals is proposed. The synthesised autocorrelation function is defined for denoting the autocorrelation properties, and the design problem is formulated as a power spectral density (PSD) fitting problem. In this way, a simple optimisation objective function is obtained and an iterative optimisation technique is applied. The proposed approach is computationally efficient and can generate a sequence with autocorrelation sidelobes that are practically zero at the required lag intervals.

The far-field acoustic signal received by an acoustic array is frequently affected by near-field interferences. This causes deterioration of the direction-of-arrival (DOA) estimate for the far-field signal. To enhance the DOA estimate, the novel near-field/far-field (NFFF) beamformer is proposed. Such a beamformer optimises the beam pattern for far-field detection by maximising the beamformer output in the direction of the far-field target signal with the imposed condition to eliminate interfering signals from near-field locations. As the interference suppression only occurs at specific positions of near-field interferences, a blind zone in the far-field direction present in conventional methods will not be introduced. The NFFF beamformer is also applicable for coherent signals and for multi-interferers. For a stationary situation where interferers’ locations are fixed, the NFFF beamformer computations do not require time updates and the computational load is similar to that of the conventional beamformer. The method can be extended to several situations such as acoustic monitoring performed from a stationary platform subjected to water currents, waves, winds and other variables, all of them generating nearby interferences, and also to different array configurations including two-dimensional (2D) and 3D arrays.

The effective utilisation of millimetre-wave radar for precipitation measurements seems to require quantitative evaluation methods of enhanced backscattering from randomly distributed particles. One such method is a computer simulation technique proposed in the literature [Radio Science, 2006, 41, RS6002], a technique that takes into account the spherical wavefront and directivity functions of transmitting and receiving antennas. The effectiveness of this technique has been previously verified by the present authors by comparing laboratory-controlled scattering experiments performed at 60 GHz using cylindrical scattering volumes, where conductive spheres of a monodispersive size are randomly distributed with statistically uniform number densities. In this latest reported work, the effectiveness of this computer simulation technique is further demonstrated for the case where conductive spheres are randomly and non-uniformly distributed with concentrically different number densities.

A novel high breakdown voltage (BV) AlGaN/GaN high-electron mobility transistor (HEMT) with a high-K/low-K compound passivation layer is proposed. The compound passivation layer is formed by blocks of low-K dielectric (Si₃N₄) embedded in a high-K passivation layer (La₂O₃). Owing to their different dielectric constants, there is a discontinuity of the horizontal electrical field at the high-K/low-K interface, which can introduce a new electric field peak in the nearby channel in the semiconductor and can also modulate the distribution of the electric field along the channel. Hence, enhancement of BV can be achieved. Compared to the typical field-plate structure, high-K/low-K passivation introduces no parasitic capacitance. On the basis of the physical mechanism, several design principles for the high-K/low-K passivation layer are presented. Numerical simulation demonstrates a BV of 1400 V for the proposed device with four blocks of low-K dielectric embedded in a high-K passivation, compared to the BVs of 917 and 288 V for the device with high-K passivation and the device with low-K passivation, respectively.

A negative capacitance field-effect transistor (FET) with sub-60 mV/decade subthreshold slope (SS) at different temperatures (i.e. 14.8 mV/decade at 300 K, 15.7 mV/decade at 360 K and 24.3 mV/decade at 400 K) is experimentally demonstrated. A detailed account of the fabrication process of a negative capacitor is first introduced, followed by the measurement setup for the negative capacitance FET. The impact of temperature on negative capacitance FETs is investigated: (i) the equation for the internal voltage gain in the FET as a function of temperature is derived using Gibbs free energy and (ii) internal voltage against gate voltage (V _Int against V _G), internal voltage gain against gate voltage (dV _Int/dV _G against V _G) and drain current against gate voltage (I _D against V _G) curves at different temperatures are measured. It is confirmed that internal voltage amplification can be achieved using the ferroelectric capacitor. However, the magnitude of the step-up voltage transformation is reduced, i.e. from 9.5 at 300 K to 2.6 at 400 K. Additionally, the SS is slightly increased (i.e. degrading from 14.8 mV/decade at 300 K to 24.3 mV/decade at 400 K) with increasing temperature; however, all SS values are better than the physical limits of SS as dictated by Boltzmann statistics.

An increase in static on-state resistance (R _ON) is observed in heterojunction field-effect transistors (HFETs) fabricated as GaN-on-silicon devices with floating substrates, when the device is operated at a higher positive bias with respect to the ground, compared to nominal grounded source measurement conditions. This is unlike the widely discussed and reported phenomenon of dynamic R _ON increase during current collapse, where an increase in R _ON is observed only after a high off-state drain bias is applied to the device. These findings are crucial from the point of view of in power electronic circuit applications either as discrete devices or in monolithic integrated circuits. The impact manifests itself as an increased threshold voltage in the HFET and affects its output characteristics, with an impact equivalent to and observed during Si substrate negative back-biasing.

Estimation of glottal flow waveform from speech requires recording of low-frequency sounds down to DC level. It causes a low-frequency noise or bias in the reconstructed glottal flow waveform. Removing this bias by linear highpass filtering (HPF) degrades the shape of glottal flow waveform. A nonlinear method based on empirical mode decomposition is proposed for removing the bias without using HPF while preserving the shape of the glottal flow waveform. The biased glottal flow waveform is decomposed into its intrinsic modes, then the low-frequency bias is estimated by using the higher modes. Glottal flow waveform is reconstructed by subtracting the bias in the time domain. The results show that the proposed method accurately estimates the bias and yields significantly better glottal flow waveforms than the conventional HPF method.

A robust speech emotion recognition system relies on a large number of training data, which are difficult to collect in practice. To tackle this problem, a novel speech emotion recognition method based on hidden factor analysis is presented. By utilising the mixture of factor analysers approach, the acoustic features are decomposed into an emotion-independent component and an emotion-specific component. The emotion-specific component, described by a low-dimensional emotion identity vector, is adopted for classification. The proposed approach is evaluated via cross-corpus emotion recognition, and the experimental results demonstrate the efficacy of the proposed method.

A ‘before convergence’ early stopping criterion (ESC) is proposed for the low-density parity check (LDPC) decoder defined in the second generation of digital video broadcasting (DVB) standards. The idea is to stop the decoding process once the estimated number of remaining errors is below the maximum capacity correction of the outer Bose-Chaudhuri-Hocquenghem (BCH) decoder used in the DVB-S2, -T2 and -C2 standards. Simulations show that the average number of iterations is reduced by up to 26% compared with the classical ESC.

A covert communication system using a random carrier having skewed α-stable distribution is introduced. The proposed method utilises the random signals with skewed α-stable distributions exhibiting antipodal characteristics to encode the binary information at the transmitter. The receiver recovers these positive and negative skewed α-stable distributed random signals by switching at different time instants, where only the receiver has the correct switching order. The third-order statistic, given as sample skewness, is used to determine the message inside the receiver structure. The main purpose of constructing such a communication system is to improve the security aspect by avoiding the self-repeating autocorrelation behaviour of the transmitted signal in the time domain. The improvement of security is shown by comparing the fractional lower-order covariance with the reference study. According to the bit error rate results, the proposed method also shows better performance when the impulsiveness of the random carrier having skewed stable distribution is increased.

Unlike the mathematical techniques adopted in classical cryptographic technology at higher protocol layers, it is shown that characteristics intrinsic to the physical layer can be exploited to secure useful information. It is shown that a retrodirective array can be made to operate more securely by incorporating directional modulation (DM) concepts. The presented new approach allows DM to operate in a multipath environment. Previously, DM systems could only operate in free space.

Optimal power allocation (PA) and sub-carrier pairing (SP) strategies for a dual-hop amplify-and-forward single-carrier frequency division multiple access network are derived. Frequency domain equalisers based on minimum mean square error (MMSE) and zero forcing (ZF) criteria are considered. For each equaliser, the problem of joint PA and SP is solved to maximise the system capacity subject to the total network power constraint. The optimality of ordered SP (OSP) and reverse OSP scenarios for MMSE and ZF equalisers, respectively, is proved.

By integrating the concept of effective capacity, the quality-of-service (QoS)-driven power and bandwidth allocation for heterogeneous wireless networks are investigated. The objective is to improve the power efficiency while providing delay QoS guarantees for the multi-mode mobile terminal users. First, the joint power and bandwidth allocation problem is formulated as a convex problem. Then, by solving the problem in the dual domain, an iterative algorithm to achieve the jointly optimal power and bandwidth allocation is proposed. The analytical results show that the optimal power and bandwidth allocation depends not only on the channel quality, but also on the delay QoS constraints. The numerical results verify that the proposed scheme can achieve the best power efficiency compared to the existing schemes.