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Test-point condensation in the diagnosis of digital circuits

Test-point condensation in the diagnosis of digital circuits

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© The Institution of Electrical Engineers
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The paper shows how simple circuitry can be used to combine test points leading to far fewer points to be observed, while still retaining the full ability to detect faults. Rules are laid down for the design of this circuitry that depend on the relationship between the test points. Practical examples are given of circuits for condensing test points for a number of different circumstances. Finally, it is shown how the adequate testing of this additional condensing circuitry can be ensured.

Inspec keywords: circuit reliability; digital circuits; fault location; testing

Other keywords: fault detection; diagnosis; circuits for condensing test points; digital circuits

Subjects: Logic and switching circuits; Digital electronics; Testing; Maintenance and reliability; Reliability

References

    1. 1)
      • M.J.Y. Williams , J.B. Angell . Enhancing testability of largescale integrated sequential circuits via test points and additional logic. IEEE Trans. , 46 - 60
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      • Z. Kohavi , P. Lavallee . Design of sequential machines with fault-detection capabilities. IEEE Trans. , 473 - 484
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      • H.Y. Chang , G.W. Heimbigner . LAMP: Controllability, observability, and maintenance engineering technique (COMET). Bell Syst. Tech. J. , 1505 - 1534
    4. 4)
      • Schertz, D.R., Metze, G.A.: `On the indistinguishability of faults in digital systems', Proceedings of the Sixth Allerton Conference on Circuit and System Theory, 1968, p. 752–760.
    5. 5)
      • Ramamoorthy, C.V.: `A structural theory of machine diagnosis', AF1PS Conference Proceedings, 1967, SJCC, 30, p. 743–756.
    6. 6)
      • Hayes, J.P., Friedman, A.D.: `Test point placement to simplify fault detection', IEEE International Symposium on Fault Tolerant Computing, 1973, p. 73–78.
    7. 7)
      • Bossen, D.C., Hong, S.J.: `Cause-effect analysis for multiple fault detection in combinational networks', IEEE International Symposium on Fault Tolerant Computing, 1971, p. 40–43.
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