A novel double trenches lateral double diffused metal oxide semiconductor with trapezoidal gate (TGDT LDMOS) is proposed. One feature of the device is that two dielectric trenches which are equivalent to two field plates are introduced in the drift region. The two dielectric trenches not only modulate the body electric field to improve the breakdown voltage (BV) of the device but also assist to deplete the drift region to reduce the specific on-resistance (R _on,sp). The other feature is the presence of the trapezoidal gate which increases the gate oxide thickness to reduce the capacitance of gate and drain (C _GD). Thereby the charge between the gate and drain (Q _GD) is reduced, so that the conduction loss of the device is decreased. Compared with the conventional LDMOS with trapezoidal gate and the single trench LDMOS with trapezoidal gate, the figure of merit (FOM = BV²/R _on,sp) of the TGDT LDMOS is increased by 112.5 and 54.5%, respectively. Compared with the conventional double trenches LDMOS with rectangle gate, the FOM is similar, but the Q _GD is reduced by 45.7%. Simultaneously, the feasible process steps of the TGDT LDMOS are given in this work.

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Double trenches LDMOS with trapezoidal gate

References

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