Titanium oxide vertical resistive random-access memory device
- Author(s): David M. Fryauf 1, 2 ; Kate J. Norris 1, 2 ; Junce Zhang 1, 2 ; Shih-Yuan Wang 1, 2 ; Nobuhiko P. Kobayashi 1, 2
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View affiliations
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Affiliations:
1:
Electrical Engineering Department, University of California, Santa Cruz, CA 95064, USA;
2: Nanostructured Energy Conversion Technology and Research (NECTAR) group at the Advanced Studies Laboratory, UC Santa Cruz – NASA Ames Research Center, Moffett Field, CA 94035, USA
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Affiliations:
1:
Electrical Engineering Department, University of California, Santa Cruz, CA 95064, USA;
- Source:
Volume 10, Issue 7,
July 2015,
p.
321 – 323
DOI: 10.1049/mnl.2015.0021 , Online ISSN 1750-0443
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Pt/TiO2/Pt vertical resistive random-access memory switching devices were fabricated in a vertical three-dimensional structure by combining conventional photolithography, electron-beam evaporation for electrodes and atomic layer deposition for dielectric layers. The active switching cross-sectional area was ∼0.02 µm2, which is comparable to nanosized devices that require more elaborative fabrication processes. Structural integrity and electrical characteristics of the vertical memory device were analysed by cross-sectional scanning, transmission electron microscopy and current–voltage characteristics.
Inspec keywords: electrical resistivity; electron beam deposition; vacuum deposition; resistive RAM; titanium compounds; photolithography; semiconductor materials; scanning electron microscopy; platinum; transmission electron microscopy; metal-semiconductor-metal structures; atomic layer deposition
Other keywords: dielectric layers; electrodes; vertical resistive random-access memory switching devices; structural integrity; nanosized devices; cross-sectional scanning electron microscopy; electrical characteristics; atomic layer deposition; electron-beam evaporation; transmission electron microscopy; active switching cross-sectional area; photolithography; current-voltage characteristics; vertical three-dimensional structure; Pt-TiO2-Pt
Subjects: Chemical vapour deposition; Lithography (semiconductor technology); Memory circuits; Vacuum deposition
References
-
-
1)
-
16. Gergel-Hackett, N., Hamadani, B., Dunlap, B., et al: ‘A flexible solution-processed memristor’, IEEE Electron Device Lett., 2009, 30, (7), pp. 706–708 (doi: 10.1109/LED.2009.2021418).
-
-
2)
-
25. Hsu, C.W., Wan, C.C., Wang, I.T., et al: ‘3D vertical TaOx/TiO2 RRAM with over 103 self-rectifying ratio and sub-μA operating current’. IEEE Int. Electron Devices Meeting (IEDM), 2013, 9–11 December 2013, pp. 10.4.1–10.4.4.
-
-
3)
-
17. Duraisamy, N., Muhammad, N.M., Kim, H.C., Jo, J.D., Choi, K.H.: ‘Fabrication of TiO2thin film memristor device using electrohydrodynamic inkjet printing’, Thin Solid Films, 2012, 520, (15), pp. 5070–5074 (doi: 10.1016/j.tsf.2012.03.003).
-
-
4)
-
8. Chen, A., Haddad, S., Wu, Y.C., et al: ‘Non-volatile resistive switching for advanced memory applications’. IEEE Int. Electron Devices Meeting, IEDM Technical Digest, 2005, pp. 746–749.
-
-
5)
-
22. Baek, I.G., Park, C.J., Ju, H., et al: ‘Realization of vertical resistive memory (VRRAM) using cost effective 3D process’. IEEE Int. Electron Devices Meeting (IEDM), 2011, pp. 31–38.
-
-
6)
-
21. Yang, J.J., Miao, F., Pickett, M.D., et al: ‘The mechanism of electroforming of metal oxide memristive switches’, Nanotechnology, 2009, 20, (21), pp. 215201 (doi: 10.1088/0957-4484/20/21/215201).
-
-
7)
-
23. Chien, W.C., Lee, F.M., Lin, Y.Y., et al: ‘Multi-layer sidewall WO X resistive memory suitable for 3D ReRAM’. Symp. on VLSI Technology (VLSIT), 2012, pp. 153–154.
-
-
8)
-
27. Jousten, K.: ‘Handbook of vacuum technology’ (John Wiley & Sons, 2008).
-
-
9)
-
28. Yang, J.J., Kobayashi, N.P., Strachan, J.P., et al: ‘Dopant control by atomic layer deposition in oxide films for memristive switches’, Chem. Mater., 2010, 23, (2), pp. 123–125 (doi: 10.1021/cm1020959).
-
-
10)
-
19. Gale, E.: ‘TiO2-based memristors and ReRAM: materials, mechanisms and models (a review)’, Semicond. Sci. Technol., 2014, 29, (10), pp. 104004 (doi: 10.1088/0268-1242/29/10/104004).
-
-
11)
-
6. Xia, Q., et al: ‘Memristor–CMOS hybrid integrated circuits for reconfigurable logic’, Nano Lett., 2009, 9, (10), pp. 3640–3645 (doi: 10.1021/nl901874j).
-
-
12)
-
7. Jo, S.H., Chang, T., Ebong, I., Bhadviya, B.B., Mazumder, P., Lu, W.: ‘Nanoscale memristor device as synapse in neuromorphic systems’, Nano Lett., 2010, 10, (4), pp. 1297–1301 (doi: 10.1021/nl904092h).
-
-
13)
-
2. Chua, L., Kang, S.M.: ‘Memristive devices and systems’, Proc. IEEE, 1976, 64, (2), pp. 209–223 (doi: 10.1109/PROC.1976.10092).
-
-
14)
-
18. Xia, Q., Yang, J.J., Wu, W., Li, X., Williams, R.S.: ‘Self-aligned memristor cross-point arrays fabricated with one nanoimprint lithography step’, Nano Lett., 2010, 10, (8), pp. 2909–2914 (doi: 10.1021/nl1017157).
-
-
15)
-
10. Choi, B.J., Yang, J.J., Zhang, M.X., et al: ‘Nitride memristors’, Appl. Phys. A, 2012, 109, (1), pp. 1–4 (doi: 10.1007/s00339-012-7052-x).
-
-
16)
-
9. Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: ‘The missing memristor found’, Nature, 2008, 453, (7191), pp. 80–83 (doi: 10.1038/nature06932).
-
-
17)
-
26. Yao, S.K.: ‘Theoretical model of thin-film deposition profile with shadow effect’, J. Appl. Phys., 1979, 50, (5), pp. 3390–3395 (doi: 10.1063/1.326330).
-
-
18)
-
12. Chua, L.: ‘If it's pinched it's a memristor’, in Tetzlaff R. (Ed.), ‘Memristors and memristive systems’ (Springer, New York, 2014), pp. 17–90.
-
-
19)
-
24. Yu, S., Chen, H.Y., Gao, B., Kang, J., Wong, H-S.P.: ‘HfOx-based vertical resistive switching random access memory suitable for bit-cost-effective three-dimensional cross-point architecture’, ACS Nano, 2013, 7, (3), pp. 2320–2325 (doi: 10.1021/nn305510u).
-
-
20)
-
5. Yang, J.J., Strukov, D.B., Stewart, D.R.: ‘Memristive devices for computing’, Nat. Nanotechnol., 2013, 8, (1), pp. 13–24 (doi: 10.1038/nnano.2012.240).
-
-
21)
-
1. Chua, L.: ‘Memristor-the missing circuit element’, IEEE Trans. Circuit Theory, 1971, 18, (5), pp. 507–519 (doi: 10.1109/TCT.1971.1083337).
-
-
22)
-
3. Xia, Q.: ‘Nanoscale resistive switches: devices, fabrication and integration’, Appl. Phys. A, 2011, 102, (4), pp. 955–965 (doi: 10.1007/s00339-011-6288-1).
-
-
23)
-
20. Yang, J.J., Strachan, J.P., Xia, Q., et al: ‘Diffusion of adhesion layer metals controls nanoscale memristive switching’, Adv. Mater., 2010, 22, (36), pp. 4034–4038 (doi: 10.1002/adma.201000663).
-
-
24)
-
15. Yang, J.J., Strachan, J.P., Miao, F., et al: ‘Metal/TiO2interfaces for memristive switches’, Appl. Phys. A, 2011, 102, (4), pp. 785–789 (doi: 10.1007/s00339-011-6265-8).
-
-
25)
-
13. Miao, F., Strachan, J.P., Yang, J.J., et al: ‘Anatomy of a nanoscale conduction channel reveals the mechanism of a high-performance memristor’, Adv. Mater., 2011, 23, (47), pp. 5633–5640 (doi: 10.1002/adma.201103379).
-
-
26)
-
29. Yang, J.J., Pickett, M.D., Li, X., Ohlberg, D.A., Stewart, D.R., Williams, R.S.: ‘Memristive switching mechanism for metal/oxide/metal nanodevices’, Nat. Nanotechnol., 2008, 3, (7), pp. 429–433 (doi: 10.1038/nnano.2008.160).
-
-
27)
-
11. Choi, B.J., Torrezan, A.C., Norris, K.J., et al: ‘Electrical performance and scalability of Pt dispersed SiO2nanometallic resistance switch’, Nano Lett., 2013, 13, (7), pp. 3213–3217 (doi: 10.1021/nl401283q).
-
-
28)
-
4. Vontobel, P.O., Robinett, W., Kuekes, P.J., Stewart, D.R., Straznicky, J., Williams, R.S.: ‘Writing to and reading from a nano-scale crossbar memory based on memristors’, Nanotechnology, 2009, 20, (42), pp. 425204 (doi: 10.1088/0957-4484/20/42/425204).
-
-
29)
-
14. Strachan, J.P., Pickett, M.D., Yang, J.J., et al: ‘Direct identification of the conducting channels in a functioning memristive device’, Adv. Mater., 2010, 22, (32), pp. 3573–3577 (doi: 10.1002/adma.201000186).
-
-
1)