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access icon openaccess Improved hybrid scrubbing scheme for spaceborne static random access memory-based field programmable gate arrays

  • Author(s): Yue Li 1 ; Zhichun Chen 2 ; Yuyao Shen 3 ; Yongqing Wang 1
    • View affiliations
  • Source: Volume 2019, Issue 19, October 2019, p. 6024 – 6027
    DOI:  10.1049/joe.2019.0049 , Online ISSN 2051-3305
This is an open access article published by the IET under the Creative Commons Attribution-NonCommercial-NoDerivs License (http://creativecommons.org/licenses/by-nc-nd/3.0/)
Received 18/01/2019, Accepted 02/05/2019, Published 30/05/2019

With the shrinking feature sizes of static random access memory-based field programmable gate arrays (FPGAs), the occurrence probability of multiple-cell upsets (MCUs) in FPGAs continues to increase. This reduces the reliability of FPGAs. This article proposes an improved hybrid scrubbing scheme to solve this problem. Based on the conventional hybrid scrubbing scheme, the error detection process is improved by changing the error correction object from an erroneous frame to an erroneous zone. MCUs can be rapidly corrected through continuous error detection and erroneous zone correction. The theoretical analysis and implementation results show that the improved hybrid scrubbing scheme can effectively reduce the average repair time of MCU errors.

Inspec keywords: error detection; SRAM chips; field programmable gate arrays

Other keywords: FPGA; error correction object; conventional hybrid scrubbing scheme; shrinking feature sizes; spaceborne static random access memory-based field programmable gate arrays; improved hybrid scrubbing scheme; multiple-cell upsets; erroneous zone correction; error detection process; continuous error detection

Subjects: Logic circuits; Memory circuits; Logic and switching circuits; Semiconductor storage

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