This is an open access article published by the IET under the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/)
A method to engineer the peak-to-valley ratio (PVR) by design of the epitaxial layers is presented. The impact of Al content on PVR of InAs/AlSb/Al x Ga1−x Sb tunnelling diode is studied. A simplified analytical model is used to explain the PVRs dependence on Al content. It was found that PVR reaches its maximum when Al content x is zero with a quantised InAs layer. The peak positions appeared in the negative differential region are effectively controlled by the applied gate bias. A PVR ratio as high as 7.1 was achieved, which is beneficial for a wide range of circuit applications. Adjusting Al content provides a new way to engineer the PVR as opposed to the conventional way of being optimised by varying barrier thicknesses or doping levels.
References
-
-
1)
-
14. Gilman, J.M.A., O'Neill, A.G.: ‘Device applications of interband tunneling structures with one, two, and three dimensions’, J. Appl. Phys., 1993, 74, pp. 351–358 (doi: 10.1063/1.354116).
-
2)
-
17. Kane, E.O.: ‘Theory of tunneling’, J. Appl. Phys., 1961, 32, (1), pp. 83–91 (doi: 10.1063/1.1735965).
-
3)
-
2. Duane, R., Mathewson, A., Concannon, A.: ‘Bistable gated bipolar device’, IEEE Electron Device Lett., 2003, 24, (10), pp. 661–663 (doi: 10.1109/LED.2003.817374).
-
4)
-
11. Chen, J.F., Wu, M.C., Yang, L., et al: ‘InAs/AlSb/GaSb single-barrier interband tunneling diodes with high peak-to-valley ratios at room temperature’, J. Appl. Phys., 1990, 68, p. 3040 (doi: 10.1063/1.346396).
-
5)
-
7. Duschl, R., Schmidt, O.G., Reitemann, G., et al: ‘High room temperature peak-to-valley current ratio in Si based Esaki diodes’, Electron. Lett., 1999, 35, (13), pp. 1111–1112 (doi: 10.1049/el:19990728).
-
6)
-
3. Cheng, X., Duane, R.: ‘A comprehensive study of bistable gated bipolar device’, IEEE Trans. Electron Devices, 2006, 53, (10), pp. 2589–2597 (doi: 10.1109/TED.2006.882391).
-
7)
-
8)
-
9. Eun, H.R., Woo, S.Y., Lee, H.G., et al: ‘Investigation of InAs/InGaAs/InP heterojunction tunneling field-effect transistors’, J. Electr. Eng. Technol., 2014, 9, (5), pp. 1654–1659 (doi: 10.5370/JEET.2014.9.5.1654).
-
9)
-
1. Ramesh, A., Berger, P., Loo, R.: ‘High 5.2 peak-to-valley current ratio in Si/SiGe resonant interband tunnel diodes grown by chemical vapour deposition’, Appl. Phys. Lett., 2012, 100, p. 0921204 (doi: 10.1063/1.3684834).
-
10)
-
13. Zeng, Y., Kuo, C.I., Hsu, C.Y., et al: ‘Quantum well InAs/AlSb/GaSb vertical tunnel FET with HSQ mechanical support’, IEEE Trans. Nanotechnol., 2015, 14, (3), pp. 580–584 (doi: 10.1109/TNANO.2015.2419232).
-
11)
-
5. Chen, S.L., Griffin, P.B., Plummer, J.D.: ‘Negative differential resistance circuit design and memory applications’, IEEE Trans. Electron Devices, 2009, 56, (4), pp. 634–671 (doi: 10.1109/TED.2009.2014194).
-
12)
-
4. Ling, J.: University of Rochester. .
-
13)
-
3. Ionescu, A., Riel, M.: ‘Tunnel field-effect transistors as energy-efficient electronic switches’, Nature Publishing, 2011, 479, pp. 329–337 (doi: 10.1038/nature10679).
-
14)
-
8. Zhou, G., Lu, Y., Li, R., et al: ‘InGaAs/InP tunnel FETs with a subthreshold swing of 93 mV/dec and ION/IOFF ratio near 106’, IEEE Electron Device Lett., 2012, 33, (6), pp. 782–784 (doi: 10.1109/LED.2012.2189546).
-
15)
-
10. Tao, Y., Teherani, J.T., Dimitri, A.A., et al: ‘In0.53Ga0.47As/GaAs0.5Sb0.5 quantum-well tunnel FETs with tunable backward diode characteristics’, IEEE Electron Device Lett., 2013, 34, (12), pp. 1503–1505 (doi: 10.1109/LED.2013.2287237).
-
16)
-
6. Yazdanpanah Goharrizi, A., Zoghi, M., Saremi, M.: ‘Armchair graphene nanoribbon resonant tunneling diodes using antidote and BN doping’, IEEE Trans. Electron Devices, 2016, 63, (9), pp. 3761–3768 (doi: 10.1109/TED.2016.2586459).
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