access icon openaccess Modelling of wire resistance effect in PCM-based nanocrossbar memory

At nanoscale grain boundaries and surface scattering effects lead to an increase of connecting wires electrical resistivity with decreasing wire dimensions. This increase of resistivity leads to significant power loss across connecting wires in nanocrossbars. In this study, the resistance of connecting wire as a function of material properties and feature size is calculated. Then the effect of the connecting wires resistance in phase change memory (PCM) performance in PCM-based passive nanocrossbar was evaluated. The performance metrics tested are: programmed resistance levels, programming duration, and energy consumption. Based on the simulation results, it was found that the power consumed in connecting wires decreases the power supplied to PCM cells. This reduction in power results in higher programmed low resistive state (R ON). The effect of connecting wire resistance on PCM performance is studied as a function of the wire size, cell position on the nanocrossbar, and nanocrossbar size. Simulation results showed that the programmed R ON is inversely proportional to feature size. Moreover, it increases up to almost 40%, with decreasing feature size to 40 nm. Moreover, programmed R ON increases proportionally with increasing nanocrossbar size. Moreover, R OFF/R ON ratio drops almost 90% of targeted ratio at 1 kbit nanocrossbars. Furthermore, cells closer to supply sources are the least affected by wire resistance, while cells furthest from supply are the most affected. Finally, at the end of this study two methods are suggested to resolve the programmed R ON reliability issue caused by energy drop across connecting wires.

Inspec keywords: grain boundaries; integrated circuit reliability; phase change memories

Other keywords: material properties; PCM-based passive nanocrossbar; energy drop; feature size; programming duration; wire resistance effect modelling; connecting wire resistance effect; phase change memory; cell position; energy consumption; nanoscale grain boundaries; nanocrossbar size; surface scattering effects; PCM cells; nanocrossbars; programmed reliability issue; power loss; PCM-based nanocrossbar memory; high-programmed low-resistive state; programmed resistance levels; connecting wire electrical resistivity; wire size function

Subjects: Semiconductor storage; Memory circuits; Reliability

References

    1. 1)
      • 2. El-Hassan, N.H., Kumar, T.N., Almurib, H.A.F.: ‘Improved SPICE model for phase change memory cell’. Proc. Int. Conf. Intelligent and Advanced Systems, pp. 27.
    2. 2)
      • 13. Cassuto, Y., Kvatinsky, S., Yaakobi, E.: ‘Sneak-path constraints in memristor crossbar arrays’. Proc. IEEE Int. Symp. Information Theory, 2013, pp. 156160.
    3. 3)
      • 9. Ziegler, M.M., Stan, M.R.: ‘Design and analysis of crossbar circuits for molecular nanoelectronics’. Proc. IEEE Conf. Nanotechnology, 2002, pp. 323327.
    4. 4)
      • 5. Chen, A.: ‘Accessibility of nano-crossbar arrays of resistive switching devices’. Proc. IEEE Conf. Nanotechnology, 2011, no. 3, pp. 17671771.
    5. 5)
      • 8. Mohammad, M.G., Terkawi, L., Albasman, M.: ‘Phase change memory faults’. Proc. Int. Conf. VLSI Design, 2006.
    6. 6)
      • 3. Qureshi, M.K., Srinivasan, V., Rivers, J.A.: ‘Scalable high performance main memory system using phase-change memory technology’. Proc. 36th Annual Int. Symp. Computer Architecture – ISCA ‘09, 2009, vol. 37, no. 3, p. 24.
    7. 7)
    8. 8)
      • 4. Dong, M., Zhong, L.: ‘Challenges to crossbar integration of nanoscale two-terminal symmetric memory devices’. Proc. Int. Conf. Nanotechnology, IEEE-NANO, 2008, pp. 692694.
    9. 9)
      • 16. Nauenheim, C.: ‘Integration of resistive switching devices in crossbar structures’ (Forschungszentrum Jülich, 2010).
    10. 10)
      • 18. Ielmini, D., Zhang, Y.: ‘Physics-based analytical model of chalcogenide-based memories for array simulation’. Technical Digest – Int. Electron Devices Meeting IEDM, 2006, vol. 40.
    11. 11)
      • 12. Chen, A.: ‘Comprehensive methodology for the design and assessment of crossbar memory array with nonlinear and asymmetric selector devices’. Proc. Technical DigestInt. Electron Devices Meeting IEDM, 2013, no. 408, pp. 746749.
    12. 12)
    13. 13)
    14. 14)
    15. 15)
    16. 16)
      • 11. Chen, A., Krivokapic, Z., Lin, M.R.: ‘A comprehensive model for crossbar memory arrays’. Device Research Conf. Digest DRC, 2012, vol. 25, no. 408, pp. 219220.
    17. 17)
    18. 18)
      • 1. Pronin, A.: ‘Phase change memory: fundamentals and measurement techniques’ (Keithley Instruments, 2010), pp. 14.
    19. 19)
      • 10. Kannan, S., Rajendran, J., Karri, R., et al: ‘Engineering crossbar based emerging memory technologies’. Proc. IEEE Int. Conf. Computer Design VLSI Computers and Processors, 2012, pp. 478479.
http://iet.metastore.ingenta.com/content/journals/10.1049/joe.2016.0212
Loading

Related content

content/journals/10.1049/joe.2016.0212
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading