An energy efficient high-speed adaptive finite impulse response filter with novel architecture is developed. Synthesis results along with novel architecture on different complementary metal–oxide semiconductor (CMOS) families are presented. Analysis is performed using Artix-7, Spartan-6 and Virtex-4 for most popular adaptive least mean square filter for different orders such as N = 8, 16, 32. The presented work is done using MATLAB (2013b) and Xilinx (14.2). From the synthesis results, it can be found that CMOS (28 nm) achieves the lowest power and critical path delay compared to others, and thus proves its efficiency in terms of energy. Different parameters are considered such as look up tables and input–output blocks, along with their optimised results.

References

1. 1)
  - 14. Meher, P.K., Park, S.Y.: ‘Area-delay-power efficient fixed-point LMS adaptive filter with low adaptation-delay’, IEEE Trans. Very Large Scale Integr. Syst., 2014, 22, (2), pp. 362–371 (doi: 10.1109/TVLSI.2013.2239321).
2. 2)
  - 11. Prakash, S., Kumar, T.G.R., Subramani, H.‘An FRGA implementation of the LMS adaptive filter for active vibration control’. Int. J. Research in Eng. and Tech., 2013, 2, (10), pp. 1–10 (doi: 10.15623/ijret.2013.0210001).
3. 3)
  - 5. Long, G., Ling, F., Proakis, J.G.: ‘The LMS algorithm with delayed coefficient adaptation’, IEEE Trans. Acoust. Speech Signal Process., 1989, 37, (9), pp. 1397–1405 (doi: 10.1109/29.31293).
4. 4)
  - 19. Park, S.Y., Meher, P.K.: ‘Low-power, high-throughput, and low-area adaptive FIR filter based on distributed arithmetic’, IEEE Trans. Circuit Syst. II, Express Briefs, 2013, 60, (6), pp. 346–350 (doi: 10.1109/TCSII.2013.2251968).
5. 5)
  - 13. Meher, P.K., Park, S.Y.: ‘Critical-path analysis and low-complexity implementation of the LMS adaptive algorithm’, IEEE Trans. Circuit Syst. I, Regul. Pap., 2014, 61, (3), pp. 778–788 (doi: 10.1109/TCSI.2013.2284173).
6. 6)
  - 1. Widrow, B., Stearns, S.D.: ‘Adaptive signal processing’ (Prentice-Hall, Englewood Cliffs, NJ, USA, 1985).
7. 7)
  - 8. Meher, P.K., Park, S.Y.: ‘Area-delay-power efficient fixed-point LMS adaptive filter with low adaptation-delay’, IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2014, 22, (2), pp. 362–371 (doi: 10.1109/TVLSI.2013.2239321).
8. 8)
  - G. Long , F. Ling , J.G. Proakis . The LMS algorithm with delayed coefficient adaptation. IEEE Trans. Acoust. Speech Signal Process. , 9 , 1397 - 1405
9. 9)
  - 14. Spartan-6 user-guide. Available at http://www.xilinx.com/support/documentation/user_guide/ug380.pdf.
10. 10)
  - 10. Meher, P.K., Park, S.Y.: ‘Critical-path analysis and low-complexity implementation of the LMS adaptive algorithm’, IEEE Trans. Circuits Syst. I, Regul. Pap., 2014, 61, (3), pp. 778–788 (doi: 10.1109/TCSI.2013.2284173).
11. 11)
  - 16. Artix-7 Low Power FPGA user guide. Available at http://www.xilinx.com/support/documentation/user_guide/.
12. 12)
  - 7. Meher, P.K., Park, S.Y.: ‘Low adaptation-delay adaptive filter part-II: an optimized architecture’. Proc. IEEE Int. Midwest Symp. Circuits and Systems, August 2011.
13. 13)
  - 9. Park, S.Y., Meher, P.K.: ‘Low-power, high-throughput, and low area adaptive FIR filter based on distributed arithmetic’, IEEE Trans. Circuits Syst. II, Express Briefs, 2013, 60, (6), pp. 346–350 (doi: 10.1109/TCSII.2013.2251968).
14. 14)
  - 13. Vanus, J., Styskala, V.: ‘Application of optimal settings of the LMS adaptive filter for speech signal processing’. Proc. IEEE Int. Multiconf. Computer Science and Information Technology, October 2010, pp. 767–774.
15. 15)
  - 2. Haykin, S., Widrow, B.: ‘Least-mean-square adaptive filters’ (Wiley-Inter Science, Hoboken, NJ, USA, 2003).
16. 16)
  - 11. Prakash, S., Kumar, T.G.R., Subramani, H.‘An FRGA implementation of the LMS adaptive filter for active vibration control’. Int. J. Research in Eng. and Tech., 2013, 2, (10), pp. 1–10 (doi: 10.15623/ijret.2013.0210001).
17. 17)
  - 4. Paarhi Keshav, K.: ‘VLSI digital signal processing systems design and implementations’ (John Wiley & Sons, New York, NY, 2003).
18. 18)
  - 12. Meher, P.K., Maheshwari, M.: ‘A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithm’. Proc. IEEE Int. Symp. Circuits Systems, May 2011, pp. 121–124.
19. 19)
  - 6. Meyer, M.D., Agrawal, D.P.: ‘A modular pipelined implementation of a delayed LMS transversal adaptive filters’. Proc. IEEE Int. Symp. Circuits and Systems, May 1990, pp. 1943–1946.
20. 20)
  - 3. Yi, Y., Woods, R., Ting, R.L.-K., Cowan, C.F.N.: ‘High speed FPGA-based implementations of delayed-LMS filters’, J. Very Large Scale Integr. (VLSI) Signal Process., 2005, 39, (1–2), pp. 113–131.
21. 21)
  - 15. Vitex-4 user guide. Available at http://www.xilinx.xom/support/documentation/user_guide/ug070.pdf.

Implementation of high-speed–low-power adaptive finite impulse response filter with novel architecture

References

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