This paper describes a systematic technique to synthesise series-gated emitter-coupled logic (ECL). The technique is applied in an autosynthesis program whereby multilevel ECL circuit schematics are generated automatically from Boolean equation or truth table input.
Inspec keywords: logic CAD; minimisation of switching nets; integrated logic circuits; emitter-coupled logic; circuit CAD
Other keywords:
Subjects: Computer-aided circuit analysis and design; Logic circuits; Computer-aided logic design; Switching theory
References
-
-
1)
- R.S. Cobbold . (1970) , Theory and application of field effect transistors.
-
2)
- H.H. Berger , S.K. Widemann . Advanced merged transistor logic by using Schottky junctions. Microelectronics , 32 - 35
-
3)
- S. Colaco , R. Davies , D. Healey , C.S. Choy . Multilevel differential logic — the bipolar alternative. J. Semi-Cust. ICs , 4 , 21 - 27
-
4)
- S. Colaco . A multilevel DCML array multiplier. Electronic Product Design
-
5)
- K. Hart , A. Slob . Integrated injection logic: a new approach to LSI. IEEE J. Solid-State Circuits , 5 , 346 - 351
-
6)
- D. Buhanan . CML scraps emitter follower for ECL speed, low power. Electronics , 22 , 93 - 94
-
7)
- C.S. Choy , P.L. Jones , D. Healey . A low power bipolar logic gate array. J. Semi-Cust. ICs , 1 , 30 - 36
-
8)
- Choy, C.S.: `A bipolar multilevel differential logic gate array', 1986, Ph.D thesis, University of Manchester, UK.
-
9)
- Heller, L.G., Griffin, W.R., Davis, J.W., Thoma, N.G.: `Cascode Voltage Switch Logic: A Differential CMOS Logic Family', Proceedings of IEEE International Solid-State Circuits Conference, 1984, p. 16–17.
-
10)
- S.K. Widemann . Advancements in bipolar VLSI circuits and technologies. IEEE J. Solid-State Circuits , 3 , 282 - 290
-
1)
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