© The Institution of Electrical Engineers
In the area of non-numerical data processing, the usual local addressing with its fixed access path is troublesome and time-consuming if very large data sets have to be handled. Next to the well-known software procedures more and more hardware solutions are sought for supporting the typically content-addressable data access. The apparently ideal solution of a parallel associative memory cannot be implemented in the capacities of mass memories, but it can be substituted for mass memories with content addressability.
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