Content addressability: an exercise in the semantic matching of hardware and software design

Content addressability: an exercise in the semantic matching of hardware and software design

For access to this article, please select a purchase option:

Buy article PDF
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Your details
Why are you recommending this title?
Select reason:
IEE Proceedings E (Computers and Digital Techniques) — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

This paper considers content addressability and discusses its potential impact on software engineering in the context of its affinity to, and thus efficient implementation of, common abstract data types. More generally, we present an approach to language design based on the abstracted characteristics of the implementing hardware. Based on the perceived needs of common data types, a prototype MOS VLSI content addressable memory component is designed together with enhancements leading to large fault-tolerant memory systems. A novel computer architecture is introduced to include this component and to provide an example target machine. The specification of a high level programming language, using a tractable set of extensions to conventional language syntax, then completes the programming environment.


    1. 1)
      • B. Parhami . Associative memories and processors: an overview and selected bibliography. Proc. IEEE , 6 , 722 - 730
    2. 2)
      • T. Kohonen . (1980) , Content-addressable memories.
    3. 3)
      • A.V. Aho , E. Hopcroft , J.D. Ullman . (1987) , Data structures and algorithms.
    4. 4)
      • A.D. Falkoff . Algorithms for parallel search memories. Journal ACM , 488 - 511
    5. 5)
      • G.M. Blair . Content addressable memory with a fault-tolerance mechanism. IEEE JSSC , 4 , 614 - 616
    6. 6)
      • R.M. Lea . Design of a high speed MOS associative memory. Electron. Lett. , 15
    7. 7)
      • B.W. Kernighan , D.M. Ritchie . (1978) , The C programming language.
    8. 8)
      • J.R. Gurd , C.C. Kirkham , I. Watson . The Manchester prototype dataflow computer. Comm. ACM , 1 , 35 - 52
    9. 9)
      • J.G. Sanderson . (1980) A relational theory of computing, Lecture notes in computer science.
    10. 10)
      • D. Shaw . (1979) , Hierarchical associative architecture for the parallel evaluation of relational algebraic database primatives.
    11. 11)
      • Y. Chu , M. Abrams . Programming languages and direct-execution computer architectures. Computer , 7 , 22 - 33

Related content

This is a required field
Please enter a valid email address