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Hierarchical multiprocessor architecture

Hierarchical multiprocessor architecture

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The paper is concerned with a multiprocessor computer architecture, which offers a flexible and high-performance system at low cost. The processing elements in the design may be connected as a hierarchy, and the system software supports a virtual memory which may be distributed throughout the processing elements. The principal form of communication is therefore through shared data structures. The paper examines the design of this memory system and considers two approaches for using the architecture, namely as a conventional process-based system and as a dataflow system.

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