Memory testing by linear checks

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Memory testing by linear checks

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In this paper we consider methods of error detection, location or correction in ROM or RAM by systems of orthogonal linear equality and inequality checks and by the Rademacher transform. Implementations and error detecting, locating, correcting capabilities of these techniques for ROM and RAM testing are also described.

Inspec keywords: error detection; read-only storage; error correction; random-access storage

Other keywords: error correction; linear checks; RAM; ROM; memory testing; error detection; error location; Rademacher transform

Subjects: Memory circuits; Semiconductor storage

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