Lifetime analyses of error-control coded semiconductor RAM systems

Lifetime analyses of error-control coded semiconductor RAM systems

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The paper is concerned with developing quantitative results on the lifetime of coded random-access semiconductor memory systems. Although individual RAM chips are highly reliable, when large numbers of chips are combined to form a large memory system, the reliability may not be sufficiently high for the given application. In this case, error-correction coding is used to improve the reliability and hence the lifetime of the system. Formulas are developed which will enable the system designer to calculate the improvement in lifetime (over an uncoded system) for any particular coding scheme and size of memory. This will enable the designer to see if a particular memory system gives the required reliability, in terms of hours of lifetime, for the particular application. In addition, the designer will be able to calculate the percentage of identical systems that will, on average, last a given length of time.


    1. 1)
      • Euzent, B.: `Intel 2116 W-channel silicon gate 16K dynamic RAM', Reliability report RR-16, Intel Corporation, .
    2. 2)
      • J. Alnether . (1979) , Error detecting and correcting codes part 1.
    3. 3)
      • L. Levine , W. Meyers . Semiconductor memory reliability with error detecting and correcting codes. Computer , 43 - 50
    4. 4)
      • W.K.S. Walker , C.W. Sundberg , C.J. Black . A reliable spaceborne memory with a single error and erasure correction scheme. IEEE Trans. , 493 - 500
    5. 5)
      • W.C. Carter , C.E. McCarthy . Implementation of an experimental fault-tolerant memory system. IEEE Trans. , 557 - 567
    6. 6)
      • R.M.F. Goodman . Error correction coding for VLSI memories. IEE Colloquium Digest 1980/41 , 119 - 122
    7. 7)
      • W. Feller . , Introduction to probability theory.
    8. 8)
      • R.A. Fisher , E.A. Cornish . The percentile points of distributions having known cumulants. Technometrics , 209 - 225
    9. 9)
      • M. Abramowitz , I. Stegun . (1964) , Handbook of mathematical functions.

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