Low-power bus encoding with crosstalk delay elimination

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Low-power bus encoding with crosstalk delay elimination

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In deep-submicron technology, minimising the propagation delay and power consumption on buses is the most important design objective in system-on-chip design. In particular, the coupling effects between wires on the bus that can cause serious problems such as crosstalk delay, noise and power consumption. Most of the previous work on bus encoding targeted either (1) minimising the power consumption on bus, (2) minimising the crosstalk delay, or (3) exploiting the known probabilistic information of data, but not all of them. The authors propose a new bus-encoding algorithm that not only minimises the dynamic power consumption on bus but also eliminates the crosstalk delay. The authors achieve the combined objective of (1) and (2) by analysing, formulating and solving the problem of minimising a weighted sum of the self-transition and cross-coupled transition activities on bus in the context of the concept of self-shield encoding. From experiments using a set of benchmark designs, it is shown that the proposed encoding technique consumes 15.4–47.4% less power than existing techniques while totally eliminating the crosstalk delay.

Inspec keywords: low-power electronics; encoding; crosstalk; integrated circuit design; system-on-chip; delays; system buses

Other keywords: low-power bus encoding; power consumption minimization; crosstalk delay elimination; self-shield encoding; system-on-chip design

Subjects: Microprocessors and microcomputers; Digital circuit design, modelling and testing; System buses; Microprocessor chips

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