Hardware/software co-design and (re)configurable computing with field programmable gate arrays (FPGAs) are used to create a highly efficient implementation of the Java virtual machine (JVM). Guidelines are provided for applying a general hardware/software co-design process to virtual machines, as are algorithms for context switching between the hardware and software partitions. The advantages of using co-design as an implementation approach for virtual machines are assessed using several benchmarks applied to the implemented co-design of the JVM. It is shown that significant performance improvements are achievable with appropriate architectural and co-design choices. The co-designed JVM could be a cost-effective solution for use in situations where the usual methods of virtual machine acceleration are inappropriate.
References
-
-
1)
-
SlackR.B.A Java chip available now, 1999, Gamelans Java J., http://softwaredev.earthweb.com/java.
-
2)
-
Ha, Y., Vanmeerbeeck, G., Schaumont, P., Vernalde, S., Engels, M., Lauwereins, R., De Man, H.: `Virtual Java/FPGA interface for networked reconfiguration', IEEE Asia South Pacific Design Automation Conf., 2001, p. 427–439.
-
3)
-
T. Suganuma ,
T. Ogasawara ,
M. Takeuchi ,
T. Yasue ,
M. Kawahito ,
K. Ishizaki ,
H. Komatsu ,
T. Nakatani
.
Overview of the IBM Java just-in-time compiler.
IBM Syst. J.
,
1 ,
175 -
194
-
4)
-
K. Compton ,
S. Hauck
.
Reconfigurable computing: a survey of systems and software.
ACM Comput. Surv.
,
2 ,
171 -
210
-
5)
-
Glossner, J., Vassiliadis, S.: `Delft-Java link translation buffer', 24th EuroMicro Conf., 1998, p. 221–228.
-
6)
-
P. Marwedel
.
(2003)
Embedded system design.
-
7)
-
J.M. O'Connor ,
M. Tremblay
.
Picojava-I: the Java virtual machine in hardware.
IEEE Micro
,
45 -
53
-
8)
-
Cardoso, J.M.P., Neto, H.C.: `Macro-based hardware compilation of Java bytecodes into a dynamic reconfigurable computing system', IEEE Symp. on Field-Programmable Custom Computing Machines, April 1999, p. 2–11.
-
9)
-
I. Page
.
Constructing hardware/software systems from a single description.
J. VLSI Signal Process.
,
87 -
107
-
10)
-
Digital Communication Technologies (n.d.)Xilinx alliance coreURL: http://www.xilinx.com/products/logicore/alliance/digital_ comm_tech/dct_lightfoot_32bit_processor.pdf (May 10, 2003).
-
11)
-
T.R. Halfhill
.
How to Soup up Java (Part I).
BYTE
,
5 ,
60 -
74
-
12)
-
Kent, K.B., Serra, M.: `Hardware architecture for Java in a hardware/software co-design of the virtual machine', Euromicro Symp. on Digital System Design (DSD), 2002, p. 61–68.
-
13)
-
Kent, K.B., Ma, H., Serra, M.: `Rapid prototyping a co-designed Java virtual machine', IEEE Int. Workshop on Rapid System Prototyping (RSP), 2004, p. 164–171.
-
14)
-
D. Gajski ,
J. Zhu ,
R. Domer ,
A. Gerstlauer ,
S. Zhao
.
(2000)
SpecC: specification language and methodology.
-
15)
-
Radhakrishnan, R., Bhargava, R., John, L.K.: `Improving Java performance using hardware translation', ACM Int. Conf. on Supercomputing (ICS), 2001, p. 427–439.
-
16)
-
WolfeA.First Java-specific chip takes wing, 1997, Electron. Eng. http://www.techweb.com/.
-
17)
-
Kreuzinger, J., Zulauf, R., Schulz, A., Ungerer, Th., Pfeffer, M., Brinkschulte, U., Krakowski, C.: `Performance evaluations and chip-space requirements of a multithreaded Java microcontroller', Second Annual Workshop on Hardware Support for Objects and Microarchitectures for Java, in conjunction with ICCD, 2000, Austin, TX, p. 32–36.
-
18)
-
Zeidman B. ‘The future of programmable logic’ Oct. 2003, Embedded Syst. Program., URL: http://www.embedded.com/showArticle.jhtml?articleID=15201141.
-
19)
-
T. Grotker ,
S. Liao ,
G. Martin ,
S. Swan
.
(2002)
System design with SystemC.
-
20)
-
Kent, K.B., Serra, M.: `Hardware/software co-design of a Java virtual machine', IEEE Int. Workshop on Rapid Systems Prototyping (RSP), 2000, p. 66–71.
-
21)
-
A. Krall ,
R. Grafl
.
CACAO – a 64 bit Java VM just-in-time compiler.
Concurrency, Pract. Exp.
,
11 ,
1017 -
1030
-
22)
-
P. Wayner
.
How to soup up Java (Part II): Nine recipes for fast, easy Java.
BYTE
,
5 ,
76 -
80
-
23)
-
Horta, E.L., Lockwood, J.W., Kofuji, S.T.: `Using PARBIT to implement partial run-time reconfigurable systems', Proc. Field-Programmable Logic and Applications, 2002, Lecture Notes Comput. Sci., p. 182–191Vol. 2438, .
-
24)
-
Schoeberl, M.: `Using JOP at an early design stage in a real world application', Workshop on Intelligent Solutions in Embedded Systems, 2003, Vienna.
-
25)
-
Glossner, J., Vassiliadis, S.: `The Delft-Java engine: an introduction', Third Int. EuroPar Conf., 1997, p. 766–770.
-
26)
-
T. Cramer ,
R. Friedman ,
T. Miller ,
D. Seberger ,
R. Wilson ,
M. Wolczko
.
Compiling Java just in time.
IEEE Micro
,
36 -
43
-
27)
-
Kent, K.B., Serra, M.: `Context switching in a hardware/software co-design of the Java virtual machine', Design Automation & Test in Europe (DATE) Designers' Forum, 2002, p. 81–86.
-
28)
-
El-Kharashi, M.W., ElGuibaly, F., Li, K.F.: `Quantitative analysis for Java microprocessor architectural requirements: instruction set design', First Workshop on Hardware Support for Objects and Microarchitectures for Java, 1999 in conjunction with ICCD. URL: http://research.sun.com/people/mario/iccd99whso/proc.pdf.
-
29)
-
P. Ashenden
.
(2000)
The designer's guide to VHDL.
http://iet.metastore.ingenta.com/content/journals/10.1049/ip-cdt_20041264
Related content
content/journals/10.1049/ip-cdt_20041264
pub_keyword,iet_inspecKeyword,pub_concept
6
6