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Hardware implementation of RAM-based neural networks for tomographic data processing

Hardware implementation of RAM-based neural networks for tomographic data processing

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The hardware discussed in the paper employs field programmable logic devices to interface with memory components and, unlike previous implementations, utilises dynamic RAM without compromising performance. The network offers the opportunity to estimate process parameters without recourse to image reconstruction. Tests reveal speedups of 17, 22 and 6 for image reconstruction, void fraction estimation and flow regime classification, respectively, from electrical capacitance tomography data.

Inspec keywords: DRAM chips; image reconstruction; computerised tomography; neural nets

Other keywords: tomographic data processing; image reconstruction; dynamic RAM; void fraction estimation; performance; process parameters; field programmable logic devices; flow regime classification; RAM-based neural networks

Subjects: Neural computing techniques; Computer vision and image processing techniques; Image recognition; Optical, image and video signal processing; Semiconductor storage; Associative storage; Neural nets (theory); Memory circuits

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