Parallel controller synthesis using Petri nets

Parallel controller synthesis using Petri nets

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A system for synthesising synchronous parallel controllers is presented. The system comprises a set of Petri net based CAD tools that have been added to an existing sequential synthesis system. Modules dedicated to the Petri net approach implement algorithms, which test the Petri net controller representation, provide an improved place encoding, and realise a novel method of generating state transition graphs from Petri nets. The algorithms are based on a new method of constructing a restricted reachability graph of a net. The system incorporates different design approaches, and so enables a designer to choose a solution that meets the specific needs of a design best. Benchmark comparisons between Petri net originated designs and equivalent FSMs show that the former are considerably more efficient in terms of area and speed when designing highly parallel circuits.

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