Guiding instruction scheduling with synchronisation markers on a superscalar based multiprocessor

Guiding instruction scheduling with synchronisation markers on a superscalar based multiprocessor

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Exploiting loop parallelism is an important way to enhance system performance. For loop-carried dependence, the original DO loop is converted into a DOACROSS loop to function concurrently. In general, synchronisation operations are inserted to maintain order dependence during parallel execution. For each processor in a shared memory multiprocessor, if the executing sequence is the same as the original source program, the action of synchronisation operation is correct; however, if each processor is used out of order, such as in the superscalar machine, the action of synchronisation operation may be incorrect. The synchronisation marker insertion method proposed resolves this problem in two steps: (i) proper synchronisation markers are appended into the array element of dependences, and (ii) synchronisation markers are generated during intermediate code generation. Finally, algorithms are proposed to prevent error during instruction scheduling.

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