On the dynamic coupling ratio of drain-coupling split gate flash using quasi-two-dimensional analysis

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On the dynamic coupling ratio of drain-coupling split gate flash using quasi-two-dimensional analysis

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An analytical model for evaluating the bias-dependent and dynamic drain coupling ratio of the drain-coupling source-side injection split gate flash is developed with comparisons of classical extraction methods. A new method to measure the technology-dependent select gate coupling ratio is also presented. Starting with the quasi-two-dimensional analyses on separate channel regions, the channel potential distributions are utilised to derive the analytical expressions of the drain coupling ratio as functions of the applied bias and storage charge. In good agreement with the experimental programming transient, full dynamics of the analytical drain coupling ratio not only explain the discrepant experimental results from classical extraction methods but also provide a solid base on designing split gate devices. Additionally, the characteristic lengths and saturation voltages of high field regions are extracted by the substrate current and the programming transient. A mean free path of about 92 Å and a impact ionisation field of 1.74 MV/cm are also verified from the source-side injection device.

Inspec keywords: flash memories; impact ionisation; integrated circuit modelling; carrier mean free path; semiconductor device models

Other keywords: characteristic lengths; drain-coupling split gate flash; saturation voltages; split gate devices; high field regions; dynamic coupling ratio; mean free path; extraction methods; programming transient; channel potential distributions; impact ionisation field; analytical drain coupling ratio; source-side injection device; source-side injection split gate flash; quasi-2D analysis; channel regions

Subjects: Semiconductor integrated circuit design, layout, modelling and testing; Semiconductor storage; Memory circuits

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