Compact modelling of noise for RF CMOS circuit design

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Compact modelling of noise for RF CMOS circuit design

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The thermal noise of short-channel NMOS transistors in a commercially available 0.13 -μm CMOS technology is studied. The experimental results are modelled with a non-quasi-static RF model, based on the principle of channel segmentation. The model is capable of predicting both drain and gate current noise accurately, without fitting any parameters to the measured noise data. An essential ingredient of the model is the gate resistance, which is shown to dominate the gate current noise. In the optimised device layouts, this gate resistance is mainly determined by the silicide-to-polysilicon contact resistance.

Inspec keywords: integrated circuit design; radiofrequency integrated circuits; semiconductor device models; contact resistance; CMOS integrated circuits; thermal noise; semiconductor device noise; MOSFET

Other keywords: channel segmentation; silicide-to-polysilicon contact resistance; 0.13 micron; CMOS technology; short-channel NMOS transistors; compact noise modelling; gate resistance; gate current noise prediction; RF CMOS circuit design; nonquasistatic RF model; thermal noise; drain current noise prediction

Subjects: Microwave integrated circuits; Semiconductor device modelling, equivalent circuits, design and testing; CMOS integrated circuits; Insulated gate field effect transistors; Semiconductor integrated circuit design, layout, modelling and testing

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