access icon free Step forward to map fully parallel energy efficient cortical columns on field programmable gate arrays

This study presents energy and area-efficient hardware architectures to map fully parallel cortical columns on reconfigurable platform – field programmable gate arrays (FPGAs). An area-efficient architecture is proposed at the system level and benchmarked with a speech recognition application. Owing to the spatio-temporal nature of spiking neurons it is more suitable to map such architectures on FPGAs where signals can be represented in binary form and communication can be performed through the use of spikes. The viability of implementing multiple recurrent neural reservoirs is demonstrated with a novel multiplier-less reconfigurable architectures and a design strategy is devised for its implementation.

Inspec keywords: recurrent neural nets; neurophysiology; field programmable gate arrays; speech recognition; reconfigurable architectures

Other keywords: speech recognition application; fully parallel energy efficient cortical columns; area-efficient hardware architectures; reconfigurable platform; spiking neurons; multiplier-less reconfigurable architectures; field programmable gate arrays; multiple recurrent neural reservoirs; FPGAs

Subjects: Logic and switching circuits; Neural computing techniques; Logic circuits; Speech recognition and synthesis equipment; Speech recognition and synthesis

References

    1. 1)
      • 10. Ghani, A., McGinnity, T.M., Maguire, L.P., Harkin, J.G.: ‘Neuro-inspired speech recognition with recurrent spiking neurons’. Int. Conf. on Artificial Neural Networks, (LNCS5163), Springer-Verlag, 2008, pp. 513522.
    2. 2)
    3. 3)
      • 25. Mathworks Inc.: ‘MATLAB\Xillinx System User Guide’. Available at: http://www.mathworks.co.uk/fpga-design/simulink-with-xilinx-systemgenerator-for-dsp.html.
    4. 4)
      • 24. Gerstner, W., Kistler, W.: ‘Spiking neuron models – single neurons, populations, plasticity’ (Cambridge University Press, UK, 2002).
    5. 5)
      • 6. Vandoorne1, K., Fiers, M., Vaerenbergh, T., , et al: ‘Advances in photonic reservoir computing on an integrated platform’. Int. Conf. on Transparent Optical Networks, 2011, pp. 14.
    6. 6)
    7. 7)
      • 4. Joshi, P., Maass, W.: ‘Movement generation and control with generic neural microcircuits’. BIO-ADIT, 2004.
    8. 8)
    9. 9)
    10. 10)
    11. 11)
      • 26. Xilinx Virtex II Pro. Hardware, Xilinx Inc.: ‘Virtex-II Pro and Virtex-II Pro X FPGA User Guide’. Available at: http://www.xilinx.com/support/documentation/user_guides/ug012.pdf.
    12. 12)
      • 16. Alexander, , O'Shaughnessy, D.: ‘Linear predictive coding’. 1998, pp. 2932.
    13. 13)
      • 11. Ghani, A., McGinnity, T.M., Maguire, L., McDaid, L., Belatreche, A.: ‘Neuro-inspired speech recognition based on reservoir computing’. Advances in Speech Recognition, September 2010, pp. 164, ISBN 978-953-307-097-1.
    14. 14)
    15. 15)
    16. 16)
      • 14. Ghani, A., McGinnity, T.M., Maguire, L.P., Harkin, J.G.: ‘Area efficient architecture for large scale implementation of biologically plausible spiking neural networks on reconfigurable hardware’. FPL, 2006, pp. 12.
    17. 17)
      • 9. Uysal, I., Sathyendra, H., Harris, J.G.: ‘Spike based feature extraction for noise robust speech recognition using phase synchrony coding’. ISCAS, 2007, pp. 15291532.
    18. 18)
      • 19. Braitenberg, V., Schuz, A.: ‘Anatomy of the cortex: statistics and geometry’ (Springer-Verlag, NY, 1991).
    19. 19)
      • 12. Ghani, A., McDaid, L.J., Belatreche, A., Ahmed, W.: ‘Neuro-inspired reconfigurable architecture for hardware/software co-design’. IEEE Int. Conf. on System on Chip, SOCC, 2009, pp. 287290.
    20. 20)
    21. 21)
    22. 22)
    23. 23)
      • 23. Maass, W., Bishop, C.: ‘Pulsed neural networks’ (The MIT Press, Massachusetts, 1999).
    24. 24)
    25. 25)
    26. 26)
      • 7. Yin, J., Meng, Y.: ‘Reservoir computing ensembles for multi-object behavior recognition’. IEEE World Congress on Computational Intelligence, 2012, pp. 18.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-smt.2014.0004
Loading

Related content

content/journals/10.1049/iet-smt.2014.0004
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading