Step forward to map fully parallel energy efficient cortical columns on field programmable gate arrays
- Author(s): Arfan Ghani 1, 2 ; Chan H. See 1 ; Syed M. Usman Ali 3
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View affiliations
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Affiliations:
1:
Department of Electrical and Electronic Engineering, University of Bolton, Bolton, BL3 5AB, UK;
2: Department of Electrical and Electronic Engineering, Newcastle University, Newcastle-upon-Tyne, NE1 7RU, UK;
3: Department of Electronic Engineering, NED University of Engineering and Technology, Karachi 75270, Pakistan
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Affiliations:
1:
Department of Electrical and Electronic Engineering, University of Bolton, Bolton, BL3 5AB, UK;
- Source:
Volume 8, Issue 6,
November 2014,
p.
432 – 440
DOI: 10.1049/iet-smt.2014.0004 , Print ISSN 1751-8822, Online ISSN 1751-8830
This study presents energy and area-efficient hardware architectures to map fully parallel cortical columns on reconfigurable platform – field programmable gate arrays (FPGAs). An area-efficient architecture is proposed at the system level and benchmarked with a speech recognition application. Owing to the spatio-temporal nature of spiking neurons it is more suitable to map such architectures on FPGAs where signals can be represented in binary form and communication can be performed through the use of spikes. The viability of implementing multiple recurrent neural reservoirs is demonstrated with a novel multiplier-less reconfigurable architectures and a design strategy is devised for its implementation.
Inspec keywords: recurrent neural nets; neurophysiology; field programmable gate arrays; speech recognition; reconfigurable architectures
Other keywords: speech recognition application; fully parallel energy efficient cortical columns; area-efficient hardware architectures; reconfigurable platform; spiking neurons; multiplier-less reconfigurable architectures; field programmable gate arrays; multiple recurrent neural reservoirs; FPGAs
Subjects: Logic and switching circuits; Neural computing techniques; Logic circuits; Speech recognition and synthesis equipment; Speech recognition and synthesis
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